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author | Felix Held <felix-coreboot@felixheld.de> | 2020-07-21 01:58:32 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2020-07-24 20:29:11 +0000 |
commit | 8ced938763a32ddd53909b58a603b3ba2640c8e4 (patch) | |
tree | 1113fcaf6f162ed9bc978c5924d11730bbcdb19f /src/vendorcode/amd/fsp/picasso/FspmUpd.h | |
parent | 4eed5e905760d6a029fe6d010143d24df055172b (diff) | |
download | coreboot-8ced938763a32ddd53909b58a603b3ba2640c8e4.tar.xz |
vc/amd/fsp/picasso: update UPD header
A new version of UPD headers generated from the FSP tree. This adds UPDs
for downcoring and increases the number of DXIO descriptor slots.
BUG=b:161152720
TEST=SATA on Mandolin works now.
Cq-Depend: chrome-internal:3175393
Change-Id: I1e27597e22af4df65d206a38b67c4920298b30b2
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43659
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd/fsp/picasso/FspmUpd.h')
-rw-r--r-- | src/vendorcode/amd/fsp/picasso/FspmUpd.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/vendorcode/amd/fsp/picasso/FspmUpd.h b/src/vendorcode/amd/fsp/picasso/FspmUpd.h index 3be69c3360..c1766e877a 100644 --- a/src/vendorcode/amd/fsp/picasso/FspmUpd.h +++ b/src/vendorcode/amd/fsp/picasso/FspmUpd.h @@ -61,7 +61,10 @@ typedef struct __packed { /** Offset 0x00CE**/ uint8_t unused8; /** Offset 0x00CF**/ uint8_t unused9; /** Offset 0x00D0**/ uint32_t bert_size; - /** Offset 0x00D4**/ uint8_t UnusedUpdSpace0[44]; + /** Offset 0x00D4**/ uint8_t UnusedUpdSpace0; + /** Offset 0x00D5**/ uint8_t ccx_down_core_mode; + /** Offset 0x00D6**/ uint8_t ccx_disable_smt; + /** Offset 0x00D7**/ uint8_t UnusedUpdSpace1[41]; /** Offset 0x0100**/ uint16_t Reserved100; /** Offset 0x0102**/ uint16_t UpdTerminator; } FSP_M_CONFIG; |