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authorWANG Siyuan <wangsiyuanbuaa@gmail.com>2015-08-10 06:43:31 +0800
committerZheng Bao <zheng.bao@amd.com>2015-09-16 01:57:40 +0000
commit9763d8e9d1f9e6d4dc26075544d1f9b20d86c614 (patch)
tree71d361bc33da82c80b90855b5b62e2bea88c992b /src/vendorcode/amd/pi/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.h
parent762cef9198bc79d98ceebebe063b42063b644479 (diff)
downloadcoreboot-9763d8e9d1f9e6d4dc26075544d1f9b20d86c614.tar.xz
AMD Merlin Falcon: update vendorcode header files to CarrizoPI 1.1.0.0
This is required the BLOB change Icb7a4f07 "AMD Merlin Falcon: Update to CarrizoPI 1.1.0.0 (Binary PI 1.4)" This is tested on Bettong Alfa(DDR3) and Beta(DDR4). Both of the boards can boot to Windows 8.1. PCIe slots, USB and NIC work. Change-Id: Ibe141c16f8f9eac2adc5d5f45a1f354fb2a7f33c Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Reviewed-on: http://review.coreboot.org/11148 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/vendorcode/amd/pi/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.h')
-rw-r--r--src/vendorcode/amd/pi/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/vendorcode/amd/pi/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.h b/src/vendorcode/amd/pi/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.h
index c18e191780..61082743de 100644
--- a/src/vendorcode/amd/pi/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.h
+++ b/src/vendorcode/amd/pi/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.h
@@ -68,6 +68,11 @@
#define PSP_MAILBOX_BASE 0x70 ///< Mailbox base offset on PCIe BAR
#define PSP_MAILBOX_STATUS_OFFSET 0x4 ///< Staus Offset
+#define PMIO_INDEX_PORT 0xCD6 ///Pmio index port
+#define PMIO_DATA_PORT 0xCD7 ///Pmio data port
+
+#define PMIO_REG62 0x62 ///PMIOx62
+
//======================================================================================
//
// Define Mailbox Status field
@@ -162,7 +167,7 @@ GetPspMboxStatus (
BOOLEAN
-PspBarInitEarly (void);
+PspBarInitEarly (VOID);
VOID
PspLibPciIndirectRead (
@@ -184,4 +189,8 @@ UINT8
PspLibAccessWidth (
IN ACCESS_WIDTH AccessWidth
);
+
+BOOLEAN
+IsS3Resume (VOID);
+
#endif // _AMD_LIB_H_