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authorMarshall Dawson <marshalldawson3rd@gmail.com>2018-03-28 16:26:26 -0600
committerPatrick Georgi <pgeorgi@google.com>2018-04-06 06:43:50 +0000
commit679f923cfc53bd0ead59a6bf56ca7a46bde5c62d (patch)
tree52278fafea8b9e4ca7559d6fc4c0a7b7b18b121d /src/vendorcode/amd/pi
parentd85c4afea56b3ca0eca4de3707884802bbdcca45 (diff)
downloadcoreboot-679f923cfc53bd0ead59a6bf56ca7a46bde5c62d.tar.xz
vc/amd/stoneyridge: Add definition for AGESA heap rebase
AgesaHeapRebase is an optional callout that allows AGESA to use a coreboot-managed heap base address. Its internal default location is determined by AMD_HEAP_START_ADDRESS which is defined as 4 MB. Add a #define that AGESA may use once the feature is available. BUG=b:74518368 Change-Id: Id23455779b1c8c4931ad1a3122587e09ad237ecc Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/25456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/vendorcode/amd/pi')
-rw-r--r--src/vendorcode/amd/pi/00670F00/AGESA.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/vendorcode/amd/pi/00670F00/AGESA.h b/src/vendorcode/amd/pi/00670F00/AGESA.h
index 2b2a8b6b62..ba1e50582c 100644
--- a/src/vendorcode/amd/pi/00670F00/AGESA.h
+++ b/src/vendorcode/amd/pi/00670F00/AGESA.h
@@ -68,6 +68,7 @@
#define AGESA_IDLE_AN_AP 0x00028107ul
#define AGESA_WAIT_FOR_ALL_APS 0x00028108ul
#define AGESA_HALT_THIS_AP 0x00028109ul
+#define AGESA_HEAP_REBASE 0x0002810aul
// AGESA ADVANCED CALLOUTS, Memory
#define AGESA_READ_SPD 0x00028140ul