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| author | Felix Held <felix-coreboot@felixheld.de> | 2020-07-21 17:09:31 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-07-23 13:47:39 +0000 |
| commit | 86db2c74ffc38ad6ca92c62f0fb2858a2423c089 (patch) | |
| tree | 546f8cc26eda84d97d2eff47c07defebe9393db4 /src/vendorcode/amd | |
| parent | a19d98647b0b1862c28b362505b30f4551b2fe2c (diff) | |
| download | coreboot-86db2c74ffc38ad6ca92c62f0fb2858a2423c089.tar.xz | |
amd/picasso: rename PCIe descriptor to DXIO descriptor
Most of the DXIO descriptors are used to configure PCIe engines and
lanes, but on Picasso system some of the DXIO lanes can also be
configured as SATA or XGBE ports.
Change-Id: I28da1b21cf0de1813d87a6873b8d4ef3c1e0e9dd
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43675
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd')
| -rw-r--r-- | src/vendorcode/amd/fsp/picasso/platform_descriptors.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h index acf821b6e2..2faa0abe97 100644 --- a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h +++ b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h @@ -109,8 +109,11 @@ typedef struct __packed { uint8_t reserved; } fsp_ddi_descriptor; -/* Picasso PCIe Descriptor: used for assigning lanes, bifurcation and other settings */ -/* Beware that the lane numbers in here are the logical and not the physical lane numbers! */ +/* + * Picasso DXIO Descriptor: Used for assigning lanes to PCIe/SATA/XGBE engines, configure + * bifurcation and other settings. Beware that the lane numbers in here are the logical and not + * the physical lane numbers! + */ typedef struct __packed { uint8_t engine_type; uint8_t start_logical_lane; // Start lane of the pci device @@ -138,6 +141,6 @@ typedef struct __packed { uint32_t channel_type :3; uint32_t turn_off_unused_lanes :1; uint8_t reserved[4]; -} fsp_pcie_descriptor; +} fsp_dxio_descriptor; #endif /* __PI_PICASSO_PLATFORM_DESCRIPTORS_H__ */ |