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authorPaul Menzel <paulepanter@users.sourceforge.net>2013-04-28 14:44:08 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-05-03 06:27:05 +0200
commit008616247d4f03b47b2eb996029072a21789f3e0 (patch)
tree27f683c0ec5a7c404e235bd43e54e6325035307d /src/vendorcode/amd
parentac222273701cc6d648d4362093762124662572c3 (diff)
downloadcoreboot-008616247d4f03b47b2eb996029072a21789f3e0.tar.xz
AMD SATA: Correct »them implement« to »then implement« in comments
The following command was used to correct all occurences of this typo. $ git grep -l "them implem" | xargs sed -i 's/them implem/then implem/' Change-Id: Iebd4635867d67861aaf4d4d64ca8a67e87833f38 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3145 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd')
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c2
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c2
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c2
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c2
-rw-r--r--src/vendorcode/amd/cimx/sb800/SATA.c2
-rw-r--r--src/vendorcode/amd/cimx/sb900/Sata.c2
6 files changed, 6 insertions, 6 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c
index d866d5685f..7b75acba76 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c
@@ -68,7 +68,7 @@ FchInitMidSataIde2Ahci (
SataBar5setting (LocalCfgPtr, &Bar5);
//
- //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+ //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
//
if ( ! (LocalCfgPtr->Misc.S3Resume) ) {
SataDriveDetection (LocalCfgPtr, &Bar5);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c
index c4a75dd777..6b4d75debe 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c
@@ -67,7 +67,7 @@ FchInitMidSataIde (
Bar5 = 0;
SataBar5setting (LocalCfgPtr, &Bar5);
//
- //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+ //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
//
if ( ! (LocalCfgPtr->Misc.S3Resume) ) {
SataDriveDetection (LocalCfgPtr, &Bar5);
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c
index 8cb2fc96f4..e6d7798b93 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c
@@ -95,7 +95,7 @@ FchInitMidSataIde2Ahci (
SataBar5setting (LocalCfgPtr, &Bar5);
//
- //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+ //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
//
if ( ! (LocalCfgPtr->Misc.S3Resume) ) {
SataDriveDetection (LocalCfgPtr, &Bar5);
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c
index ba89d4575c..2f30fd3562 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c
@@ -94,7 +94,7 @@ FchInitMidSataIde (
Bar5 = 0;
SataBar5setting (LocalCfgPtr, &Bar5);
//
- //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+ //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
//
if ( ! (LocalCfgPtr->Misc.S3Resume) ) {
SataDriveDetection (LocalCfgPtr, &Bar5);
diff --git a/src/vendorcode/amd/cimx/sb800/SATA.c b/src/vendorcode/amd/cimx/sb800/SATA.c
index 4aa3be7fcc..5966ec8e03 100644
--- a/src/vendorcode/amd/cimx/sb800/SATA.c
+++ b/src/vendorcode/amd/cimx/sb800/SATA.c
@@ -544,7 +544,7 @@ sataInitMidPost (
{
UINT32 ddBar5;
sataBar5setting (pConfig, &ddBar5);
- //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+ //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
if ( ! (pConfig->S3Resume) && ( ((pConfig->SataClass) != AHCI_MODE) && ((pConfig->SataClass) != RAID_MODE) ) ) {
sataDriveDetection (pConfig, &ddBar5);
}
diff --git a/src/vendorcode/amd/cimx/sb900/Sata.c b/src/vendorcode/amd/cimx/sb900/Sata.c
index 98e1f57134..fca8005ee0 100644
--- a/src/vendorcode/amd/cimx/sb900/Sata.c
+++ b/src/vendorcode/amd/cimx/sb900/Sata.c
@@ -852,7 +852,7 @@ sataInitMidPost (
{
UINT32 ddBar5;
sataBar5setting (pConfig, &ddBar5);
- //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+ //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
if ( ! (pConfig->S3Resume) && ( ((pConfig->SataClass) != AHCI_MODE) && ((pConfig->SataClass) != RAID_MODE) ) ) {
sataDriveDetection (pConfig, &ddBar5);
}