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authorJacob Garber <jgarber1@ualberta.ca>2020-02-24 19:06:07 -0700
committerAngel Pons <th3fanbus@gmail.com>2020-04-18 19:07:19 +0000
commit9e3e49234d30dadd5888b389ed572a2faac1c6af (patch)
tree895b32f496d393d781ac3cc75baab5a16adea89c /src/vendorcode/amd
parentab734d8c057d103c7aafd09182c375c3d522e947 (diff)
downloadcoreboot-9e3e49234d30dadd5888b389ed572a2faac1c6af.tar.xz
vc/amd/agesa/f15tn,f16kb: Fix array types
These variables are declared to be arrays of MICROCODE_PATCHES_4K (which is a struct containing a UINT8 array). However, the actual definitions of these arrays ignore the wrapping struct and just use the underlying UINT8 arrays directly, which causes a compiler error when using LTO because of the type mismatch. Fix the type declaration so that it matches. Change-Id: I6bef27507092fe72fe2f836c427ebb2c19009e78 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40436 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/vendorcode/amd')
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatchTables.c2
-rw-r--r--src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbMicrocodePatchTables.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatchTables.c
index c0ca136523..a3e7e5ddce 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatchTables.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatchTables.c
@@ -65,7 +65,7 @@ RDATA_GROUP (G3_DXE)
* T Y P E D E F S A N D S T R U C T U R E S
*----------------------------------------------------------------------------------------
*/
-extern CONST MICROCODE_PATCHES_4K ROMDATA *CpuF15TnMicroCodePatchArray[];
+extern CONST UINT8 ROMDATA *CpuF15TnMicroCodePatchArray[];
extern CONST UINT8 ROMDATA CpuF15TnNumberOfMicrocodePatches;
/*----------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbMicrocodePatchTables.c
index 4790709618..519b4ec1f9 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbMicrocodePatchTables.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbMicrocodePatchTables.c
@@ -65,7 +65,7 @@ RDATA_GROUP (G3_DXE)
* T Y P E D E F S A N D S T R U C T U R E S
*----------------------------------------------------------------------------------------
*/
-extern CONST MICROCODE_PATCHES_4K ROMDATA *CpuF16KbMicroCodePatchArray[];
+extern CONST UINT8 ROMDATA *CpuF16KbMicroCodePatchArray[];
extern CONST UINT8 ROMDATA CpuF16KbNumberOfMicrocodePatches;
/*----------------------------------------------------------------------------------------