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authorFelix Held <felix-coreboot@felixheld.de>2020-07-14 00:23:11 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-07-15 08:32:47 +0000
commitf06d7d7003b788c74b0fb6ab8fefaa4524cf2808 (patch)
tree747e971c443a91b3bbbc436928b79b873a94f816 /src/vendorcode/amd
parent692dde599f35719d3e9e9a43800b9deea50c002a (diff)
downloadcoreboot-f06d7d7003b788c74b0fb6ab8fefaa4524cf2808.tar.xz
amd/picasso: rework DXIO and DDI UPD handling
Turning the DXIO and DDI descriptor fields in the FSP_S_CONFIG struct into arrays allows to properly iterate over the fields. BUG=b:158695393 TEST=Mandolin still boots. Change-Id: I85debe4d52399e933768b89b665ff10c9f7779f8 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43434 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd')
-rw-r--r--src/vendorcode/amd/fsp/picasso/FspsUpd.h15
1 files changed, 5 insertions, 10 deletions
diff --git a/src/vendorcode/amd/fsp/picasso/FspsUpd.h b/src/vendorcode/amd/fsp/picasso/FspsUpd.h
index 5a408316ff..11e77bd3ff 100644
--- a/src/vendorcode/amd/fsp/picasso/FspsUpd.h
+++ b/src/vendorcode/amd/fsp/picasso/FspsUpd.h
@@ -9,19 +9,14 @@
#include <FspUpd.h>
+#define FSPS_UPD_DXIO_DESCRIPTOR_COUNT 6
+#define FSPS_UPD_DDI_DESCRIPTOR_COUNT 4
+
typedef struct __packed {
/** Offset 0x0020**/ uint32_t emmc0_mode;
/** Offset 0x0024**/ uint8_t unused0[12];
- /** Offset 0x0030**/ uint8_t dxio_descriptor0[16];
- /** Offset 0x0040**/ uint8_t dxio_descriptor1[16];
- /** Offset 0x0050**/ uint8_t dxio_descriptor2[16];
- /** Offset 0x0060**/ uint8_t dxio_descriptor3[16];
- /** Offset 0x0070**/ uint8_t dxio_descriptor4[16];
- /** Offset 0x0080**/ uint8_t dxio_descriptor5[16];
- /** Offset 0x0090**/ uint32_t ddi_descriptor0;
- /** Offset 0x0094**/ uint32_t ddi_descriptor1;
- /** Offset 0x0098**/ uint32_t ddi_descriptor2;
- /** Offset 0x009C**/ uint32_t ddi_descriptor3;
+ /** Offset 0x0030**/ uint8_t dxio_descriptor[FSPS_UPD_DXIO_DESCRIPTOR_COUNT][16];
+ /** Offset 0x0090**/ uint32_t ddi_descriptor[FSPS_UPD_DDI_DESCRIPTOR_COUNT];
/** Offset 0x00A0**/ uint32_t unused1;
/** Offset 0x00A4**/ uint32_t unused2;
/** Offset 0x00A8**/ uint32_t unused3;