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authorJoel Kitching <kitching@google.com>2018-08-17 15:38:59 +0800
committerMartin Roth <martinroth@google.com>2018-08-22 15:33:50 +0000
commit44cff7a8975b2adbf2866718ec8c61ab0d9bd505 (patch)
tree92d4975db05b7dde5b861f03e5ee3c65bbb6b661 /src/vendorcode/google/chromeos/gnvs.h
parent5846d5727a05e395d13317daba049e0e56e15d33 (diff)
downloadcoreboot-44cff7a8975b2adbf2866718ec8c61ab0d9bd505.tar.xz
cbtable: remove chromeos_acpi from cbtable
Since we can derive chromeos_acpi's location from that of ACPI GNVS, remove chromeos_acpi entry from cbtable and instead use acpi_gnvs + GVNS_CHROMEOS_ACPI_OFFSET. BUG=b:112288216 TEST=None CQ-DEPEND=CL:1179725 Change-Id: I74d8a9965a0ed7874ff03884e7a921fd725eace9 Signed-off-by: Joel Kitching <kitching@google.com> Reviewed-on: https://review.coreboot.org/28190 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/google/chromeos/gnvs.h')
-rw-r--r--src/vendorcode/google/chromeos/gnvs.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/vendorcode/google/chromeos/gnvs.h b/src/vendorcode/google/chromeos/gnvs.h
index e865c0e832..62fa08c5f2 100644
--- a/src/vendorcode/google/chromeos/gnvs.h
+++ b/src/vendorcode/google/chromeos/gnvs.h
@@ -41,6 +41,18 @@
#define ACTIVE_ECFW_RO 0
#define ACTIVE_ECFW_RW 1
+/*
+ * chromeos_acpi_t portion of ACPI GNVS is assumed to live at
+ * 0x100 - 0x1000. When defining global_nvs_t, use check_member
+ * to ensure that it is properly aligned:
+ *
+ * check_member(global_nvs_t, chromeos, GNVS_CHROMEOS_ACPI_OFFSET);
+ */
+#define GNVS_CHROMEOS_ACPI_OFFSET 0x100
+
+/* device_nvs_t is assumed to live directly after chromeos_acpi_t. */
+#define GNVS_DEVICE_NVS_OFFSET 0x1000
+
typedef struct {
/* ChromeOS specific */
u32 vbt0; // 00 boot reason