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authorPhilipp Deppenwiese <zaolin@das-labor.org>2018-02-27 19:40:52 +0100
committerMartin Roth <martinroth@google.com>2018-06-04 20:33:07 +0000
commitc07f8fbe6fd13e4245da71574b52b47e9733db84 (patch)
tree12db8b3c40552eab81045c6165538e2d3ba36ce8 /src/vendorcode/google/chromeos
parent961d31bdb3c97e177156ed335d6f2c726d08ab51 (diff)
downloadcoreboot-c07f8fbe6fd13e4245da71574b52b47e9733db84.tar.xz
security/tpm: Unify the coreboot TPM software stack
* Remove 2nd software stack in pc80 drivers directory. * Create TSPI interface for common usage. * Refactor TSS / TIS code base. * Add vendor tss (Cr50) directory. * Change kconfig options for TPM to TPM1. * Add user / board configuration with: * MAINBOARD_HAS_*_TPM # * BUS driver * MAINBOARD_HAS_TPM1 or MAINBOARD_HAS_TPM2 * Add kconfig TPM user selection (e.g. pluggable TPMs) * Fix existing headers and function calls. * Fix vboot for interface usage and antirollback mode. Change-Id: I7ec277e82a3c20c62a0548a1a2b013e6ce8f5b3f Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/24903 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/google/chromeos')
-rw-r--r--src/vendorcode/google/chromeos/Kconfig2
-rw-r--r--src/vendorcode/google/chromeos/Makefile.inc2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig
index 1a4ac4fbbe..4f1fad9a73 100644
--- a/src/vendorcode/google/chromeos/Kconfig
+++ b/src/vendorcode/google/chromeos/Kconfig
@@ -33,7 +33,7 @@ if CHROMEOS
config CR50_IMMEDIATELY_COMMIT_FW_SECDATA
bool
- default y if MAINBOARD_HAS_TPM_CR50
+ default y if TPM_CR50
config CHROMEOS_RAMOOPS
bool "Reserve space for Chrome OS ramoops"
diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc
index 9d87f6eae3..e833e0dd74 100644
--- a/src/vendorcode/google/chromeos/Makefile.inc
+++ b/src/vendorcode/google/chromeos/Makefile.inc
@@ -22,7 +22,7 @@ ramstage-y += vpd_decode.c cros_vpd.c vpd_mac.c vpd_serialno.c vpd_calibration.c
ramstage-$(CONFIG_CHROMEOS_DISABLE_PLATFORM_HIERARCHY_ON_RESUME) += tpm2.c
ramstage-$(CONFIG_HAVE_REGULATORY_DOMAIN) += wrdd.c
ramstage-$(CONFIG_USE_SAR) += sar.c
-ramstage-$(CONFIG_MAINBOARD_HAS_TPM_CR50) += cr50_enable_update.c
+ramstage-$(CONFIG_TPM_CR50) += cr50_enable_update.c
ifeq ($(CONFIG_ARCH_MIPS),)
bootblock-y += watchdog.c
ramstage-y += watchdog.c