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authorJulius Werner <jwerner@chromium.org>2019-03-05 16:53:33 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-08 08:33:24 +0000
commitcd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch)
tree8e89136e2da7cf54453ba8c112eda94415b56242 /src/vendorcode/google/chromeos
parentb3a8cc54dbaf833c590a56f912209a5632b71f49 (diff)
downloadcoreboot-cd49cce7b70e80b4acc49b56bb2bb94370b4d867.tar.xz
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/vendorcode/google/chromeos')
-rw-r--r--src/vendorcode/google/chromeos/acpi.c4
-rw-r--r--src/vendorcode/google/chromeos/acpi/chromeos.asl2
-rw-r--r--src/vendorcode/google/chromeos/chromeos.h8
-rw-r--r--src/vendorcode/google/chromeos/cr50_enable_update.c2
-rw-r--r--src/vendorcode/google/chromeos/elog.c4
-rw-r--r--src/vendorcode/google/chromeos/ramoops.c8
-rw-r--r--src/vendorcode/google/chromeos/sar.c4
-rw-r--r--src/vendorcode/google/chromeos/tpm2.c4
8 files changed, 18 insertions, 18 deletions
diff --git a/src/vendorcode/google/chromeos/acpi.c b/src/vendorcode/google/chromeos/acpi.c
index 8fd47a6a76..59c4901754 100644
--- a/src/vendorcode/google/chromeos/acpi.c
+++ b/src/vendorcode/google/chromeos/acpi.c
@@ -14,7 +14,7 @@
*/
#include <arch/acpigen.h>
-#if IS_ENABLED(CONFIG_GENERIC_GPIO_LIB)
+#if CONFIG(GENERIC_GPIO_LIB)
#include <gpio.h>
#endif
#include "chromeos.h"
@@ -33,7 +33,7 @@ void chromeos_acpi_gpio_generate(const struct cros_gpio *gpios, size_t num)
acpigen_write_integer(gpios[i].type);
acpigen_write_integer(gpios[i].polarity);
gpio_num = gpios[i].gpio_num;
-#if IS_ENABLED(CONFIG_GENERIC_GPIO_LIB)
+#if CONFIG(GENERIC_GPIO_LIB)
/* Get ACPI pin from GPIO library if available */
if (gpios[i].gpio_num != CROS_GPIO_VIRTUAL)
gpio_num = gpio_acpi_pin(gpio_num);
diff --git a/src/vendorcode/google/chromeos/acpi/chromeos.asl b/src/vendorcode/google/chromeos/acpi/chromeos.asl
index d813b22ac0..4852600748 100644
--- a/src/vendorcode/google/chromeos/acpi/chromeos.asl
+++ b/src/vendorcode/google/chromeos/acpi/chromeos.asl
@@ -15,7 +15,7 @@
#include <security/vboot/vbnv_layout.h>
-#if IS_ENABLED(CONFIG_CHROMEOS)
+#if CONFIG(CHROMEOS)
/* GPIO package generated at run time. */
External (OIPG)
diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index 6831261dc5..6db7fc44dd 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -24,7 +24,7 @@
#include <security/vboot/misc.h>
#include <security/vboot/vboot_common.h>
-#if IS_ENABLED(CONFIG_CHROMEOS)
+#if CONFIG(CHROMEOS)
/* functions implemented in watchdog.c */
void mark_watchdog_tombstone(void);
void reboot_from_watchdog(void);
@@ -44,9 +44,9 @@ struct romstage_handoff;
#include "gnvs.h"
struct device;
-#if IS_ENABLED(CONFIG_CHROMEOS_RAMOOPS)
+#if CONFIG(CHROMEOS_RAMOOPS)
void chromeos_ram_oops_init(chromeos_acpi_t *chromeos);
-#if IS_ENABLED(CONFIG_CHROMEOS_RAMOOPS_DYNAMIC)
+#if CONFIG(CHROMEOS_RAMOOPS_DYNAMIC)
static inline void chromeos_reserve_ram_oops(struct device *dev, int idx) {}
#else /* CONFIG_CHROMEOS_RAMOOPS_DYNAMIC */
void chromeos_reserve_ram_oops(struct device *dev, int idx);
@@ -70,7 +70,7 @@ void chromeos_acpi_gpio_generate(const struct cros_gpio *gpios, size_t num);
* ACPI-specific Chrome OS needs.
*/
void mainboard_chromeos_acpi_generate(void);
-#if IS_ENABLED(CONFIG_CHROMEOS)
+#if CONFIG(CHROMEOS)
void chromeos_dsdt_generator(struct device *dev);
#else
#define chromeos_dsdt_generator DEVICE_NOOP
diff --git a/src/vendorcode/google/chromeos/cr50_enable_update.c b/src/vendorcode/google/chromeos/cr50_enable_update.c
index 660fe2e86f..91a10cb9aa 100644
--- a/src/vendorcode/google/chromeos/cr50_enable_update.c
+++ b/src/vendorcode/google/chromeos/cr50_enable_update.c
@@ -153,7 +153,7 @@ static void enable_update(void *unused)
/* clear current post code avoid chatty eventlog on subsequent boot*/
post_code(0);
- if (IS_ENABLED(CONFIG_POWER_OFF_ON_CR50_UPDATE))
+ if (CONFIG(POWER_OFF_ON_CR50_UPDATE))
poweroff();
halt();
}
diff --git a/src/vendorcode/google/chromeos/elog.c b/src/vendorcode/google/chromeos/elog.c
index fbbfd16196..17cb4d9018 100644
--- a/src/vendorcode/google/chromeos/elog.c
+++ b/src/vendorcode/google/chromeos/elog.c
@@ -18,7 +18,7 @@
#include <elog.h>
#include <security/vboot/vboot_common.h>
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
#include <arch/acpi.h>
#endif
@@ -41,7 +41,7 @@ static void elog_add_boot_reason(void *unused)
if (dev) {
int log_event = 1;
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
/* Skip logging developer mode in ACPI resume path */
if (acpi_is_wakeup())
log_event = 0;
diff --git a/src/vendorcode/google/chromeos/ramoops.c b/src/vendorcode/google/chromeos/ramoops.c
index c72af00c54..7eef2d1338 100644
--- a/src/vendorcode/google/chromeos/ramoops.c
+++ b/src/vendorcode/google/chromeos/ramoops.c
@@ -23,7 +23,7 @@
#include <device/device.h>
#include "chromeos.h"
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
static void set_ramoops(chromeos_acpi_t *chromeos, void *ram_oops, size_t size)
{
@@ -42,7 +42,7 @@ static void reserve_ram_oops_dynamic(chromeos_acpi_t *chromeos)
const size_t size = CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE;
void *ram_oops;
- if (!IS_ENABLED(CONFIG_CHROMEOS_RAMOOPS_DYNAMIC))
+ if (!CONFIG(CHROMEOS_RAMOOPS_DYNAMIC))
return;
ram_oops = cbmem_add(CBMEM_ID_RAM_OOPS, size);
@@ -50,7 +50,7 @@ static void reserve_ram_oops_dynamic(chromeos_acpi_t *chromeos)
set_ramoops(chromeos, ram_oops, size);
}
-#if IS_ENABLED(CONFIG_CHROMEOS_RAMOOPS_DYNAMIC)
+#if CONFIG(CHROMEOS_RAMOOPS_DYNAMIC)
static inline void set_global_chromeos_pointer(chromeos_acpi_t *chromeos) {}
#else /* !CONFIG_CHROMEOS_RAMOOPS_DYNAMIC */
@@ -96,7 +96,7 @@ void chromeos_ram_oops_init(chromeos_acpi_t *chromeos)
reserve_ram_oops_dynamic(chromeos);
}
-#elif IS_ENABLED(CONFIG_CHROMEOS_RAMOOPS_NON_ACPI)
+#elif CONFIG(CHROMEOS_RAMOOPS_NON_ACPI)
static void ramoops_alloc(void *arg)
{
diff --git a/src/vendorcode/google/chromeos/sar.c b/src/vendorcode/google/chromeos/sar.c
index 417b9b6744..bbcb211c3a 100644
--- a/src/vendorcode/google/chromeos/sar.c
+++ b/src/vendorcode/google/chromeos/sar.c
@@ -74,7 +74,7 @@ int get_wifi_sar_limits(struct wifi_sar_limits *sar_limits)
sar_expected_len = buffer_size;
bin_buff_adjusted_size = sizeof(struct wifi_sar_limits);
- if (!IS_ENABLED(CONFIG_GEO_SAR_ENABLE)) {
+ if (!CONFIG(GEO_SAR_ENABLE)) {
sar_expected_len = buffer_size -
sizeof(struct wifi_sar_delta_table) *
sizeof(uint8_t) * 2;
@@ -88,7 +88,7 @@ int get_wifi_sar_limits(struct wifi_sar_limits *sar_limits)
printk(BIOS_ERR, "Error: Could not locate '%s' in VPD.\n",
wifi_sar_limit_key);
- if (!IS_ENABLED(CONFIG_WIFI_SAR_CBFS))
+ if (!CONFIG(WIFI_SAR_CBFS))
return -1;
printk(BIOS_DEBUG, "Checking CBFS for default SAR values\n");
diff --git a/src/vendorcode/google/chromeos/tpm2.c b/src/vendorcode/google/chromeos/tpm2.c
index d4816e09f9..08e8ddb995 100644
--- a/src/vendorcode/google/chromeos/tpm2.c
+++ b/src/vendorcode/google/chromeos/tpm2.c
@@ -22,10 +22,10 @@ static void disable_platform_hierarchy(void *unused)
{
int ret;
- if (!IS_ENABLED(CONFIG_TPM2))
+ if (!CONFIG(TPM2))
return;
- if (!IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT))
+ if (!CONFIG(RESUME_PATH_SAME_AS_BOOT))
return;
ret = tlcl_lib_init();