vendorcode/{amd,cavium,intel}: Remove trailing whitespace

find src -type f "!" -regex ".*\.\(vbt\|bin\)" -exec sed -i -e "s,\s\+$,,g" {} \;

Change-Id: Ic70cf8524dcd0a0f5700f91b704b3c545dd8a01a
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30959
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 9 insertions, 9 deletions

diff --git a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PciCf8Lib.h b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PciCf8Lib.h
index d77f406ebd..9f3795076a 100644
--- a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PciCf8Lib.h
+++ b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PciCf8Lib.h
@@ -1,8 +1,8 @@
 /** @file
   Provides services to access PCI Configuration Space using the I/O ports 0xCF8 and 0xCFC.
-  
-  This library is identical to the PCI Library, except the access method for performing PCI 
-  configuration cycles must be through I/O ports 0xCF8 and 0xCFC.  This library only allows 
+
+  This library is identical to the PCI Library, except the access method for performing PCI
+  configuration cycles must be through I/O ports 0xCF8 and 0xCFC.  This library only allows
   access to PCI Segment #0.
 
 Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
@@ -40,20 +40,20 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
   (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
 
 /**
-  Registers a PCI device so PCI configuration registers may be accessed after 
+  Registers a PCI device so PCI configuration registers may be accessed after
   SetVirtualAddressMap().
-  
-  Registers the PCI device specified by Address so all the PCI configuration registers 
+
+  Registers the PCI device specified by Address so all the PCI configuration registers
   associated with that PCI device may be accessed after SetVirtualAddressMap() is called.
-  
+
   If Address > 0x0FFFFFFF, then ASSERT().
   If the register specified by Address >= 0x100, then ASSERT().
 
   @param  Address Address that encodes the PCI Bus, Device, Function and
                   Register.
-  
+
   @retval RETURN_SUCCESS           The PCI device was registered for runtime access.
-  @retval RETURN_UNSUPPORTED       An attempt was made to call this function 
+  @retval RETURN_UNSUPPORTED       An attempt was made to call this function
                                    after ExitBootServices().
   @retval RETURN_UNSUPPORTED       The resources required to access the PCI device
                                    at runtime could not be mapped.