diff options
author | Martin Roth <gaumless@gmail.com> | 2014-04-04 13:23:41 -0600 |
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committer | Martin Roth <martin.roth@se-eng.com> | 2014-04-11 17:29:25 +0200 |
commit | 954f3882f1ea8512de9a5a6a38569c36bffae405 (patch) | |
tree | 08b3e87b98473386410f7bb180d66c08c3e712f0 /src/vendorcode/intel/fsp/baytrail/include/fspinfoheader.h | |
parent | debd7657548ed7cdc67dcabe3f6e69b33093a43a (diff) | |
download | coreboot-954f3882f1ea8512de9a5a6a38569c36bffae405.tar.xz |
Add the Bay Trail FSP include & srx directories
These are the .h and .c files from Intel that support interaction
with the FSP. These have been modified from the FSP distribution
only to strip trailing whitespace.
Intel® Atom™ processor E3800 product family (formerly Bay Trail)
"Intel® Firmware Support Package (Intel® FSP) provides key
programming information for initializing Intel® silicon and can be
easily integrated into a boot loader of the developer’s choice.
It is easy to adopt, scalable to design, reduces time-to-market, and
is economical to build."
http://www.intel.com/fsp
Change-Id: I0fa64dbaf640493cdb5e670e8d213a49d9e7dcfb
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/5456
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/vendorcode/intel/fsp/baytrail/include/fspinfoheader.h')
-rw-r--r-- | src/vendorcode/intel/fsp/baytrail/include/fspinfoheader.h | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspinfoheader.h b/src/vendorcode/intel/fsp/baytrail/include/fspinfoheader.h new file mode 100644 index 0000000000..b277bcd5f7 --- /dev/null +++ b/src/vendorcode/intel/fsp/baytrail/include/fspinfoheader.h @@ -0,0 +1,62 @@ +/** + +Copyright (C) 2013, Intel Corporation + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +* Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. +* Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. +* Neither the name of Intel Corporation nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + THE POSSIBILITY OF SUCH DAMAGE. + +**/ + +#ifndef _FSP_INFO_HEADER_H_ +#define _FSP_INFO_HEADER_H_ + +#pragma pack(1) + +typedef struct { + + UINT32 Signature; // Off 0x94 + UINT32 HeaderLength; + UINT8 Reserved1[3]; + UINT8 HeaderRevision; + UINT32 ImageRevision; + + CHAR8 ImageId[8]; // Off 0xA4 + UINT32 ImageSize; + UINT32 ImageBase; + + UINT32 ImageAttribute; // Off 0xB4 + UINT32 CfgRegionOffset; + UINT32 CfgRegionSize; + UINT32 ApiEntryNum; + + UINT32 NemInitEntry; // Off 0xC4 + UINT32 FspInitEntry; + UINT32 NotifyPhaseEntry; + UINT32 Reserved2; + +} FSP_INFO_HEADER; + +#pragma pack() + +#endif |