diff options
author | Marc Jones <marcj303@gmail.com> | 2017-05-07 16:47:36 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-06-26 00:46:03 +0000 |
commit | 21cde8b83227fa324f246672b1e2d58408ea6bf8 (patch) | |
tree | b5c0ce8fd9426def5d0e8863265840c891fb1076 /src/vendorcode | |
parent | 244848462def7075e0c812a2f71c408668cacfe4 (diff) | |
download | coreboot-21cde8b83227fa324f246672b1e2d58408ea6bf8.tar.xz |
soc/amd/stoneyridge: Add CPU files
Copy cpu/amd/pi/00670F00 to soc/amd/stoneyridge and
soc/amd/common. This is the second patch in the process of
converting Stoney Ridge to soc/.
Changes:
- update Kconfig and Makefiles
- update vendorcode/amd for new soc/ path
Change-Id: I8b6b1991372c2c6a02709777a73615a86e78ac26
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19723
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/vendorcode')
-rw-r--r-- | src/vendorcode/amd/Kconfig | 5 | ||||
-rw-r--r-- | src/vendorcode/amd/pi/Kconfig | 6 | ||||
-rw-r--r-- | src/vendorcode/amd/pi/Makefile.inc | 9 |
3 files changed, 13 insertions, 7 deletions
diff --git a/src/vendorcode/amd/Kconfig b/src/vendorcode/amd/Kconfig index 978170f00a..89c5a90448 100644 --- a/src/vendorcode/amd/Kconfig +++ b/src/vendorcode/amd/Kconfig @@ -1,7 +1,7 @@ # # This file is part of the coreboot project. # -# Copyright (C) 2013-2014 Sage Electronic Engineering, LLC +# Copyright (C) 2013-2017 Sage Electronic Engineering, LLC # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -13,13 +13,14 @@ # GNU General Public License for more details. # -if CPU_AMD_PI +if CPU_AMD_PI || SOC_AMD_PI menu "AMD Platform Initialization" choice prompt "AGESA source" default CPU_AMD_AGESA_BINARY_PI if CPU_AMD_PI + default CPU_AMD_AGESA_BINARY_PI if SOC_AMD_PI default CPU_AMD_AGESA_OPENSOURCE help Select the method for including the AMD Platform Initialization diff --git a/src/vendorcode/amd/pi/Kconfig b/src/vendorcode/amd/pi/Kconfig index ef317f2dee..971e3b1f89 100644 --- a/src/vendorcode/amd/pi/Kconfig +++ b/src/vendorcode/amd/pi/Kconfig @@ -26,7 +26,7 @@ # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # -if CPU_AMD_PI_00630F01 || CPU_AMD_PI_00730F01 || CPU_AMD_PI_00670F00_FP4 || CPU_AMD_PI_00670F00_FT4 || CPU_AMD_PI_00660F01 +if CPU_AMD_PI_00630F01 || CPU_AMD_PI_00730F01 || CPU_AMD_PI_00670F00_FP4 || CPU_AMD_PI_00670F00_FT4 || CPU_AMD_PI_00660F01 || SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 config AGESA_BINARY_PI_VENDORCODE_PATH string "AGESA PI directory path" @@ -34,6 +34,8 @@ config AGESA_BINARY_PI_VENDORCODE_PATH default "src/vendorcode/amd/pi/00730F01" if CPU_AMD_PI_00730F01 default "src/vendorcode/amd/pi/00670F00" if CPU_AMD_PI_00670F00_FP4 default "src/vendorcode/amd/pi/00670F00" if CPU_AMD_PI_00670F00_FT4 + default "src/vendorcode/amd/pi/00670F00" if SOC_AMD_STONEYRIDGE_FP4 + default "src/vendorcode/amd/pi/00670F00" if SOC_AMD_STONEYRIDGE_FT4 default "src/vendorcode/amd/pi/00660F01" if CPU_AMD_PI_00660F01 help Specify where to find the AGESA header files @@ -45,6 +47,8 @@ config AGESA_BINARY_PI_FILE default "3rdparty/blobs/pi/amd/00730F01/FT3b/AGESA.bin" if CPU_AMD_PI_00730F01 default "3rdparty/blobs/pi/amd/00670F00/FP4/AGESA.bin" if CPU_AMD_PI_00670F00_FP4 default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA.bin" if CPU_AMD_PI_00670F00_FT4 + default "3rdparty/blobs/pi/amd/00670F00/FP4/AGESA.bin" if SOC_AMD_STONEYRIDGE_FP4 + default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA.bin" if SOC_AMD_STONEYRIDGE_FT4 default "3rdparty/blobs/pi/amd/00660F01/FP4/AGESA.bin" if CPU_AMD_PI_00660F01 help Specify the binary file to use for AMD platform initialization. diff --git a/src/vendorcode/amd/pi/Makefile.inc b/src/vendorcode/amd/pi/Makefile.inc index 279b89df4a..e686700ee3 100644 --- a/src/vendorcode/amd/pi/Makefile.inc +++ b/src/vendorcode/amd/pi/Makefile.inc @@ -28,8 +28,9 @@ # #***************************************************************************** -ifeq ($(CONFIG_CPU_AMD_PI_00630F01)$(CONFIG_CPU_AMD_PI_00730F01)$(CONFIG_CPU_AMD_PI_00670F00_FP4)$(CONFIG_CPU_AMD_PI_00670F00_FT4)$(CONFIG_CPU_AMD_PI_00660F01),y) +ifeq ($(CONFIG_CPU_AMD_PI_00630F01)$(CONFIG_CPU_AMD_PI_00730F01)$(CONFIG_CPU_AMD_PI_00670F00_FP4)$(CONFIG_CPU_AMD_PI_00670F00_FT4)$(CONFIG_CPU_AMD_PI_00660F01)$(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) # AGESA V5 Files + AGESA_ROOT = $(call strip_quotes,$(CONFIG_AGESA_BINARY_PI_VENDORCODE_PATH)) AGESA_INC = -I$(obj) @@ -48,7 +49,7 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Family AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Feature AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch/Common -ifeq ($(CONFIG_CPU_AMD_PI_00670F00_FP4)$(CONFIG_CPU_AMD_PI_00670F00_FT4),y) +ifeq ($(CONFIG_CPU_AMD_PI_00670F00_FP4)$(CONFIG_CPU_AMD_PI_00670F00_FT4)$(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch/Kern AGESA_INC += -I$(AGESA_ROOT)/Proc/Psp/PspBaseLib endif @@ -62,7 +63,7 @@ endif AGESA_INC += -I$(src)/northbridge/amd/pi -ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y) +ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) AGESA_INC += -I$(src)/soc/amd/stoneyridge/include else AGESA_INC += -I$(src)/southbridge/amd/pi/hudson @@ -110,7 +111,7 @@ endef agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/*.[cS]) agesa_raw_files += $(wildcard $(AGESA_ROOT)/binaryPI/*.[cS]) -ifeq ($(CONFIG_CPU_AMD_PI_00670F00_FP4)$(CONFIG_CPU_AMD_PI_00670F00_FT4),y) +ifeq ($(CONFIG_CPU_AMD_PI_00670F00_FP4)$(CONFIG_CPU_AMD_PI_00670F00_FT4)$(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Kern/KernImc/*.[cS]) agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Common/*.[cS]) agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Psp/PspBaseLib/*.[cS]) |