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authorFrancois Toguo <francois.toguo.fotso@intel.com>2021-01-26 10:27:49 -0800
committerPatrick Georgi <pgeorgi@google.com>2021-02-22 07:22:50 +0000
commit15cbc3b5996ae64aff2e4741c4c3ec3d7f5cc1a7 (patch)
treeec401d461fcbbace3194553db3953a4d80e8d332 /src/vendorcode
parent619c60f94cc00251bfaedde4f1764e2f96dcdecd (diff)
downloadcoreboot-15cbc3b5996ae64aff2e4741c4c3ec3d7f5cc1a7.tar.xz
soc/intel/tigerlake: Add CrashLog implementation for intel TGL
CrashLog is a diagnostic feature for Intel TGL based platforms. It is meant to capture the state of the platform before a crash. The state of relevant registers is preserved across a warm reset. BUG=None TEST=CrashLog data generated, extracted, processed, decoded sucessfully on delbin. Signed-off-by: Francois Toguo <francois.toguo.fotso@intel.com> Change-Id: Ie3763cebcd1178709cc8597710bf062a30901809 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49943 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/vendorcode')
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h
index 909ba36708..d05318005a 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h
@@ -72,9 +72,11 @@ typedef struct {
**/
UINT8 EnableAbove4GBMmio;
-/** Offset 0x004B - Reserved
+/** Offset 0x004B - Enable/Disable CrashLog Device 10
+ Enable(Default): Enable CPU CrashLog Device 10, Disable: Disable CPU CrashLog
+ $EN_DIS
**/
- UINT8 Reserved0;
+ UINT8 CpuCrashLogDevice;
/** Offset 0x004C - MemorySpdPtr00
**/