diff options
| author | Ronak Kanabar <ronak.kanabar@intel.com> | 2020-10-01 16:35:58 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-19 06:54:21 +0000 |
| commit | 72cd6b0d01a8027f3b00d408c25db1ca6bb9d770 (patch) | |
| tree | c0698ed843f25eff4482d19328e57bb23bdc9354 /src/vendorcode | |
| parent | 362ec8dee21950b1f5e7f209c22311d7bebfb435 (diff) | |
| download | coreboot-72cd6b0d01a8027f3b00d408c25db1ca6bb9d770.tar.xz | |
vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2376
The headers added are generated as per FSP v2376.
Previous FSP version was 2295.
Changes Include:
- add GpioOverride UPD in Fspm.h
- add new header FirmwareVersionInfo.h
Cq-Depend: TBD
Change-Id: I65c03d8eda11664541479983c7be11854410e1c6
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45899
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode')
| -rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/jasperlake/FirmwareVersionInfo.h | 72 | ||||
| -rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h | 12 |
2 files changed, 83 insertions, 1 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FirmwareVersionInfo.h b/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FirmwareVersionInfo.h new file mode 100644 index 0000000000..c375feeef0 --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FirmwareVersionInfo.h @@ -0,0 +1,72 @@ +/** @file
+
+Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+ This file is automatically generated. Please do NOT modify !!!
+
+**/
+
+#ifndef __FIRMWARE_VERSION_INFO_H__
+#define __FIRMWARE_VERSION_INFO_H__
+
+#include <IndustryStandard/SmBios.h>
+
+#define INTEL_FIRMWARE_VERSION_INFO_GROUP_NAME "Firmware Version Info"
+
+#pragma pack(1)
+
+///
+/// Firmware Version Structure
+///
+typedef struct {
+ UINT8 MajorVersion;
+ UINT8 MinorVersion;
+ UINT8 Revision;
+ UINT16 BuildNumber;
+} INTEL_FIRMWARE_VERSION;
+
+///
+/// Firmware Version Info (FVI) Structure
+///
+typedef struct {
+ SMBIOS_TABLE_STRING ComponentName; ///< String Index of Component Name
+ SMBIOS_TABLE_STRING VersionString; ///< String Index of Version String
+ INTEL_FIRMWARE_VERSION Version; ///< Firmware version
+} INTEL_FIRMWARE_VERSION_INFO;
+
+///
+/// SMBIOS OEM Type Intel Firmware Version Info (FVI) Structure
+///
+typedef struct {
+ SMBIOS_STRUCTURE Header; ///< SMBIOS structure header
+ UINT8 Count; ///< Number of FVI entries in this structure
+ INTEL_FIRMWARE_VERSION_INFO Fvi[1]; ///< FVI structure(s)
+} SMBIOS_TABLE_TYPE_OEM_INTEL_FVI;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h index 8155e85ea7..fc167c5b14 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h @@ -2708,7 +2708,17 @@ typedef struct { /** Offset 0x067E - Reserved **/ - UINT8 Reserved38[18]; + UINT8 Reserved38; + +/** Offset 0x067F - GPIO Override + Gpio Override Level - FSP will not configure any GPIOs and rely on GPIO setings + before moved to FSP. Available configurations 0: Disable;1: Level 1 +**/ + UINT8 GpioOverride; + +/** Offset 0x0680 - Reserved +**/ + UINT8 Reserved39[16]; } FSP_M_CONFIG; /** Fsp M UPD Configuration |