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authorKerry She <shekairui@gmail.com>2011-08-18 18:03:44 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2011-09-07 01:08:57 +0200
commitfeed329a0c006968242aa3065506b5f37f4308d4 (patch)
tree0ef0e9e0c112230dd03fe14e199b0be74776b112 /src/vendorcode
parent16d3ec6a58b7a7ba52d4d17299b977e5c3e0557f (diff)
downloadcoreboot-feed329a0c006968242aa3065506b5f37f4308d4.tar.xz
AMD F14 southbridge update
This change adds the southbridge related code to support the update of the AMD Family14 cpus to the rec C0 level. Some of the changes reside in mainboard folders but they reference changed files in the southbridge folder so they are included herein. Change-Id: Ib7786f9f697eaf0bf8abd9140c4dd0c42927ec7e Signed-off-by: Frank Vibrans <frank.vibrans@amd.com> Signed-off-by: efdesign98 <efdesign98@gmail.com> Signed-off-by: Kerry She <kerry.she@amd.com> Signed-off-by: Kerry She <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/135 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/vendorcode')
-rw-r--r--src/vendorcode/amd/cimx/sb800/AMDSBLIB.h3
-rw-r--r--src/vendorcode/amd/cimx/sb800/OEM.h4
-rwxr-xr-xsrc/vendorcode/amd/cimx/sb900/Oem.h4
3 files changed, 8 insertions, 3 deletions
diff --git a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
index 83722d8f5d..6c92227eda 100644
--- a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
+++ b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
@@ -113,5 +113,6 @@ unsigned int ReadIo32(IN unsigned short Address);
void WriteIo8(IN unsigned short Address, IN unsigned char Data);
void WriteIo16(IN unsigned short Address, IN unsigned short Data);
void WriteIo32(IN unsigned short Address, IN unsigned int Data);
-void CpuidRead(IN unsigned int CpuidFcnAddress, OUT CPUID_DATA *Value);
+//void CpuidRead(IN unsigned int CpuidFcnAddress, OUT CPUID_DATA *Value);
+void CpuidRead(unsigned int CpuidFcnAddress, CPUID_DATA *Value);
unsigned char ReadNumberOfCpuCores(void);
diff --git a/src/vendorcode/amd/cimx/sb800/OEM.h b/src/vendorcode/amd/cimx/sb800/OEM.h
index 6ca4271c1a..9abea30dbb 100644
--- a/src/vendorcode/amd/cimx/sb800/OEM.h
+++ b/src/vendorcode/amd/cimx/sb800/OEM.h
@@ -30,7 +30,9 @@
*
*/
-#define BIOS_SIZE 0x04 //04 - 1MB
+#ifndef BIOS_SIZE
+ #define BIOS_SIZE 0x04 //04 - 1MB
+#endif
#define LEGACY_FREE 0x00
//#define ACPI_SLEEP_TRAP 0x01
//#define SPREAD_SPECTRUM_EPROM_LOAD 0x01
diff --git a/src/vendorcode/amd/cimx/sb900/Oem.h b/src/vendorcode/amd/cimx/sb900/Oem.h
index edda5411a3..14bc530ed7 100755
--- a/src/vendorcode/amd/cimx/sb900/Oem.h
+++ b/src/vendorcode/amd/cimx/sb900/Oem.h
@@ -27,7 +27,9 @@
;
;*********************************************************************************/
-#define BIOS_SIZE 0x04 //04 - 1MB
+#ifndef BIOS_SIZE
+ #define BIOS_SIZE 0x04 //04 - 1MB
+#endif
#define LEGACY_FREE 0x00
#define ACPI_SLEEP_TRAP 0x01
//#define SPREAD_SPECTRUM_EPROM_LOAD 0x01