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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-03-09 13:31:52 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-04-06 22:13:32 +0200 |
| commit | 5995ee62f725cb06f7ed9b1f3f6df89078cff065 (patch) | |
| tree | 53805da895e8d2d1ef841c3561a0b3cf7e7be016 /src/vendorcode | |
| parent | 47f4cf87bd0622f1de5df592fbe9b5f759f0ea34 (diff) | |
| download | coreboot-5995ee62f725cb06f7ed9b1f3f6df89078cff065.tar.xz | |
northbridge/amd/stoney: Add FT4 package
Add package options to the CPU Kconfig that may be selected by the
mainboard's Kconfig file. Stoney Ridge is available in FP4 and FT4
packages and each requires a unique binaryPI image. Default to the
correct blob used by the northbridge by looking at the CPU's package.
Also modify Gardenia to select the right package.
See the Infrastructure Roadmap for FP4 (#53555) and FT4 (#55349) for
additional details for the packages.
Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from commit 7b8ed7b732b7cf5503862c5edc6537d672109aec)
Change-Id: I7bb15bc4c85c5b4d3d5a6c926c4bc346a282ef27
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/18989
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/vendorcode')
| -rw-r--r-- | src/vendorcode/amd/pi/Kconfig | 8 | ||||
| -rw-r--r-- | src/vendorcode/amd/pi/Makefile.inc | 6 |
2 files changed, 8 insertions, 6 deletions
diff --git a/src/vendorcode/amd/pi/Kconfig b/src/vendorcode/amd/pi/Kconfig index 3b1abe67a0..ef317f2dee 100644 --- a/src/vendorcode/amd/pi/Kconfig +++ b/src/vendorcode/amd/pi/Kconfig @@ -26,13 +26,14 @@ # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # -if CPU_AMD_PI_00630F01 || CPU_AMD_PI_00730F01 || CPU_AMD_PI_00670F00 || CPU_AMD_PI_00660F01 +if CPU_AMD_PI_00630F01 || CPU_AMD_PI_00730F01 || CPU_AMD_PI_00670F00_FP4 || CPU_AMD_PI_00670F00_FT4 || CPU_AMD_PI_00660F01 config AGESA_BINARY_PI_VENDORCODE_PATH string "AGESA PI directory path" default "src/vendorcode/amd/pi/00630F01" if CPU_AMD_PI_00630F01 default "src/vendorcode/amd/pi/00730F01" if CPU_AMD_PI_00730F01 - default "src/vendorcode/amd/pi/00670F00" if CPU_AMD_PI_00670F00 + default "src/vendorcode/amd/pi/00670F00" if CPU_AMD_PI_00670F00_FP4 + default "src/vendorcode/amd/pi/00670F00" if CPU_AMD_PI_00670F00_FT4 default "src/vendorcode/amd/pi/00660F01" if CPU_AMD_PI_00660F01 help Specify where to find the AGESA header files @@ -42,7 +43,8 @@ config AGESA_BINARY_PI_FILE string "AGESA PI binary file name" default "3rdparty/blobs/pi/amd/00630F01/FP3/AGESA.bin" if CPU_AMD_PI_00630F01 default "3rdparty/blobs/pi/amd/00730F01/FT3b/AGESA.bin" if CPU_AMD_PI_00730F01 - default "3rdparty/blobs/pi/amd/00670F00/FP4/AGESA.bin" if CPU_AMD_PI_00670F00 + default "3rdparty/blobs/pi/amd/00670F00/FP4/AGESA.bin" if CPU_AMD_PI_00670F00_FP4 + default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA.bin" if CPU_AMD_PI_00670F00_FT4 default "3rdparty/blobs/pi/amd/00660F01/FP4/AGESA.bin" if CPU_AMD_PI_00660F01 help Specify the binary file to use for AMD platform initialization. diff --git a/src/vendorcode/amd/pi/Makefile.inc b/src/vendorcode/amd/pi/Makefile.inc index 2cd18c1376..07f208ac76 100644 --- a/src/vendorcode/amd/pi/Makefile.inc +++ b/src/vendorcode/amd/pi/Makefile.inc @@ -28,7 +28,7 @@ # #***************************************************************************** -ifeq ($(CONFIG_CPU_AMD_PI_00630F01)$(CONFIG_CPU_AMD_PI_00730F01)$(CONFIG_CPU_AMD_PI_00670F00)$(CONFIG_CPU_AMD_PI_00660F01),y) +ifeq ($(CONFIG_CPU_AMD_PI_00630F01)$(CONFIG_CPU_AMD_PI_00730F01)$(CONFIG_CPU_AMD_PI_00670F00_FP4)$(CONFIG_CPU_AMD_PI_00670F00_FT4)$(CONFIG_CPU_AMD_PI_00660F01),y) # AGESA V5 Files AGESA_ROOT = $(call strip_quotes,$(CONFIG_AGESA_BINARY_PI_VENDORCODE_PATH)) @@ -48,7 +48,7 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Family AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Feature AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch/Common -ifeq ($(CONFIG_CPU_AMD_PI_00670F00),y) +ifeq ($(CONFIG_CPU_AMD_PI_00670F00_FP4)$(CONFIG_CPU_AMD_PI_00670F00_FT4),y) AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch/Kern AGESA_INC += -I$(AGESA_ROOT)/Proc/Psp/PspBaseLib endif @@ -105,7 +105,7 @@ endef agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/*.[cS]) agesa_raw_files += $(wildcard $(AGESA_ROOT)/binaryPI/*.[cS]) -ifeq ($(CONFIG_CPU_AMD_PI_00670F00),y) +ifeq ($(CONFIG_CPU_AMD_PI_00670F00_FP4)$(CONFIG_CPU_AMD_PI_00670F00_FT4),y) agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Kern/KernImc/*.[cS]) agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Common/*.[cS]) agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Psp/PspBaseLib/*.[cS]) |