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| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2018-08-17 13:49:12 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-08-27 15:55:06 +0000 |
| commit | 837e3387e5b6d4ea5823775087d23f9fb9e41f5f (patch) | |
| tree | df82eec5dfe3a71b9e3ea805ce9ae11628c38238 /src/vendorcode | |
| parent | 7a5f0a981715b48ccd87647ebf02050376dd3be6 (diff) | |
| download | coreboot-837e3387e5b6d4ea5823775087d23f9fb9e41f5f.tar.xz | |
mb/google/octopus/variants/baseboard: Update DPTF parameters
Update TSR1 trip point from 48C to 50C.
Also, change power limit2 minimum value from 8W to 10W.
These are the values as per recent thermal tuning.
BUG=b:79779737
BRANCH=None
TEST=Build coreboot for Octopus board.
Change-Id: I33a9d2dc3e0e5566d95b1f1e46d3922dc8965b2b
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/28187
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode')
0 files changed, 0 insertions, 0 deletions