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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-03-09 20:08:15 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-02 04:48:20 +0000 |
commit | 21e609c1c92c47bd8990c2ce25adf5987b5dd1b2 (patch) | |
tree | 62f5cb8577d9e62fc44cd8da69ac396230ab1e8c /src/vendorcode | |
parent | ed8d2777f8c363d40abe51576a285a6fecf7ee3e (diff) | |
download | coreboot-21e609c1c92c47bd8990c2ce25adf5987b5dd1b2.tar.xz |
AGESA: Move romstage-ramstage splitline
In AGESA specification AmdInitEnv() is to be called once
host memory allocator has started. In coreboot context this
could mean either availability of CBMEM or malloc heap.
As for AmdS3LateRestore(), there is no requirement to have
it run as part of the romstage either.
Change-Id: Icc8d97b82df89e2480e601d5c2e094de0365b0a5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18888
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode')
-rw-r--r-- | src/vendorcode/amd/agesa/common/agesa-entry-cfg.h | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h b/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h index e882f2e457..c3aa267c39 100644 --- a/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h +++ b/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h @@ -8,17 +8,20 @@ #define AGESA_ENTRY_INIT_EARLY TRUE #define AGESA_ENTRY_INIT_POST TRUE -/* Not implemented in coreboot romstage. */ -#define AGESA_ENTRY_INIT_RECOVERY FALSE - #define AGESA_ENTRY_INIT_RESUME IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) -#define AGESA_ENTRY_INIT_LATE_RESTORE IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) -/* Move to ramstage? */ +#if IS_ENABLED(CONFIG_AGESA_LEGACY_WRAPPER) #define AGESA_ENTRY_INIT_ENV TRUE +#define AGESA_ENTRY_INIT_LATE_RESTORE IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) +#endif #else +#if !IS_ENABLED(CONFIG_AGESA_LEGACY_WRAPPER) +#define AGESA_ENTRY_INIT_ENV TRUE +#define AGESA_ENTRY_INIT_LATE_RESTORE IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) +#endif + #define AGESA_ENTRY_INIT_MID TRUE #define AGESA_ENTRY_INIT_LATE TRUE #define AGESA_ENTRY_INIT_S3SAVE IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) |