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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-05-31 20:03:11 +0300
committerPatrick Georgi <pgeorgi@google.com>2020-06-16 08:03:44 +0000
commit040c531158861284b7d21f1e8a26b1f6d4ccad58 (patch)
tree885d3a1d85c9361572cc4992f0d455222649f4bf /src
parent21ba5eea89be9ee5019b3651814dfe148f16bc81 (diff)
downloadcoreboot-040c531158861284b7d21f1e8a26b1f6d4ccad58.tar.xz
soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)
Change-Id: I8c4dc5ab91891de9737189bd7ae86df18d86f758 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41960 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/cpu/intel/smm_reloc.h1
-rw-r--r--src/soc/intel/apollolake/cpu.c2
-rw-r--r--src/soc/intel/cannonlake/cpu.c2
-rw-r--r--src/soc/intel/common/block/smm/smm.c12
-rw-r--r--src/soc/intel/icelake/cpu.c2
-rw-r--r--src/soc/intel/jasperlake/cpu.c2
-rw-r--r--src/soc/intel/skylake/cpu.c2
-rw-r--r--src/soc/intel/tigerlake/cpu.c2
8 files changed, 17 insertions, 8 deletions
diff --git a/src/include/cpu/intel/smm_reloc.h b/src/include/cpu/intel/smm_reloc.h
index 4e9c1814ef..cf621aad93 100644
--- a/src/include/cpu/intel/smm_reloc.h
+++ b/src/include/cpu/intel/smm_reloc.h
@@ -44,7 +44,6 @@ void smm_relocate(void);
* SMIs. They are split so that other work between the 2 actions. */
void smm_southbridge_clear_state(void);
void smm_southbridge_enable_smi(void);
-void smm_southbridge_enable(uint16_t pm1_events);
/* To be removed. */
void smm_initialize(void);
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index 5c923ad368..eb07e1e104 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -234,7 +234,7 @@ static void relocation_handler(int cpu, uintptr_t curr_smbase,
static void post_mp_init(void)
{
- smm_southbridge_enable(PWRBTN_EN | GBL_EN);
+ global_smi_enable();
if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE))
mp_run_on_all_cpus(sgx_configure, NULL);
diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c
index 5b329eef3c..26d8c2ea97 100644
--- a/src/soc/intel/cannonlake/cpu.c
+++ b/src/soc/intel/cannonlake/cpu.c
@@ -254,7 +254,7 @@ static void post_mp_init(void)
* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing.
*/
- smm_southbridge_enable(GBL_EN);
+ global_smi_enable_no_pwrbtn();
/* Lock down the SMRAM space. */
smm_lock();
diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c
index 93fcee2602..0b120a7023 100644
--- a/src/soc/intel/common/block/smm/smm.c
+++ b/src/soc/intel/common/block/smm/smm.c
@@ -23,7 +23,7 @@ void smm_southbridge_clear_state(void)
pmc_clear_all_gpe_status();
}
-void smm_southbridge_enable(uint16_t pm1_events)
+static void smm_southbridge_enable(uint16_t pm1_events)
{
uint32_t smi_params = ENABLE_SMI_PARAMS;
@@ -61,6 +61,16 @@ void smm_southbridge_enable(uint16_t pm1_events)
pmc_enable_smi(smi_params);
}
+void global_smi_enable(void)
+{
+ smm_southbridge_enable(PWRBTN_EN | GBL_EN);
+}
+
+void global_smi_enable_no_pwrbtn(void)
+{
+ smm_southbridge_enable(GBL_EN);
+}
+
void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
{
/*
diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c
index 2533fe076e..45c81cade7 100644
--- a/src/soc/intel/icelake/cpu.c
+++ b/src/soc/intel/icelake/cpu.c
@@ -220,7 +220,7 @@ static void post_mp_init(void)
* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing.
*/
- smm_southbridge_enable(PWRBTN_EN | GBL_EN);
+ global_smi_enable();
/* Lock down the SMRAM space. */
smm_lock();
diff --git a/src/soc/intel/jasperlake/cpu.c b/src/soc/intel/jasperlake/cpu.c
index 0c84468d6c..ed9cfe703c 100644
--- a/src/soc/intel/jasperlake/cpu.c
+++ b/src/soc/intel/jasperlake/cpu.c
@@ -184,7 +184,7 @@ static void post_mp_init(void)
* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing.
*/
- smm_southbridge_enable(PWRBTN_EN | GBL_EN);
+ global_smi_enable();
/* Lock down the SMRAM space. */
smm_lock();
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 89b7cb6f9d..49d817ffef 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -294,7 +294,7 @@ static void post_mp_init(void)
* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing.
*/
- smm_southbridge_enable(GBL_EN);
+ global_smi_enable_no_pwrbtn();
/* Lock down the SMRAM space. */
if (CONFIG(HAVE_SMI_HANDLER))
diff --git a/src/soc/intel/tigerlake/cpu.c b/src/soc/intel/tigerlake/cpu.c
index f5870ecef7..ec78d15616 100644
--- a/src/soc/intel/tigerlake/cpu.c
+++ b/src/soc/intel/tigerlake/cpu.c
@@ -190,7 +190,7 @@ static void post_mp_init(void)
* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing.
*/
- smm_southbridge_enable(PWRBTN_EN | GBL_EN);
+ global_smi_enable();
/* Lock down the SMRAM space. */
smm_lock();