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| author | Iru Cai <mytbk920423@gmail.com> | 2018-12-17 13:21:36 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2018-12-18 13:33:14 +0000 |
| commit | 0766c98aaf6eaf75dea8d8272d57a785d242558c (patch) | |
| tree | f3be16fe4af2ef442c34cd976987a0f852574843 /src | |
| parent | 05653ca2567440d9c2153d5a7db591c33715bd9f (diff) | |
| download | coreboot-0766c98aaf6eaf75dea8d8272d57a785d242558c.tar.xz | |
nb/intel/haswell: Add server processor host bridge device ID
The device ID is documented in "Intel Xeon Processor E3-1200 v3
Product Family Datasheet volume 2" section 2.2.
Tested with ASRock H81M-HDS with Xeon E3-1271 v3. SeaBIOS payload can
find the boot devices, and GRUB payload can boot Debian GNU/Linux on
the SATA disk.
Change-Id: I999391c9bbc6b39526ad7aec8a6d8fe1a9b5f921
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30266
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/intel/haswell/northbridge.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index 42e1501cff..d11eb2e54d 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -480,6 +480,7 @@ static const unsigned short mc_pci_device_ids[] = { 0x0c00, /* Desktop */ 0x0c04, /* Mobile */ 0x0a04, /* ULT */ + 0x0c08, /* Server */ 0 }; |