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authorGreg Watson <jarrah@users.sourceforge.net>2003-11-15 15:29:30 +0000
committerGreg Watson <jarrah@users.sourceforge.net>2003-11-15 15:29:30 +0000
commit0d4295f2f830d0ab73346eb15eddf59838b48372 (patch)
treea07f2284779e07771d6fd70668828c7fa96721d5 /src
parent83348820150d5491d5ccc5ba9921fe5c007c16dd (diff)
downloadcoreboot-0d4295f2f830d0ab73346eb15eddf59838b48372.tar.xz
options for better control of rom layout
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1288 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/config/Options.lb14
1 files changed, 13 insertions, 1 deletions
diff --git a/src/config/Options.lb b/src/config/Options.lb
index 39e4bf81c0..9a1a219e94 100644
--- a/src/config/Options.lb
+++ b/src/config/Options.lb
@@ -174,7 +174,7 @@ define CONFIG_CHIP_CONFIGURE
end
define CONFIG_USE_INIT
default 0
- export never
+ export used
comment "Use stage 1 initialization code"
end
@@ -236,6 +236,12 @@ define _ROMBASE
export always
comment "Base address of LinuxBIOS in ROM"
end
+define _ROMSTART
+ default none
+ format "0x%x"
+ export used
+ comment "Start address of LinuxBIOS in ROM"
+end
define _RESET
default {_ROMBASE}
format "0x%x"
@@ -266,6 +272,12 @@ define _RAMBASE
export always
comment "Base address of LinuxBIOS in RAM"
end
+define _RAMSTART
+ default none
+ format "0x%x"
+ export used
+ comment "Start address of LinuxBIOS in RAM"
+end
define USE_DCACHE_RAM
default 0
export used