diff options
| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2020-08-19 14:47:53 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-08-27 18:14:39 +0000 |
| commit | 1860cd460aaf3dabb58d996b81d51916949e59b3 (patch) | |
| tree | 360f941f9d319775398ebb1771243747a62e1a94 /src | |
| parent | 81a2f45bd2e11ec0cfd699e583eb5e295725b110 (diff) | |
| download | coreboot-1860cd460aaf3dabb58d996b81d51916949e59b3.tar.xz | |
mb/google/volteer*: Enable IPU
Enable IPU for Volteer and Volteer2 variants for MIPI camera.
BUG=165340186
BRANCH=None
TEST=IPU is enabled and shows in lspci.
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Change-Id: I66d60474e16c7a9aa8006d42b22510c1495dbd84
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44628
Reviewed-by: Daniel H Kang <daniel.h.kang@intel.corp-partner.google.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/volteer/variants/volteer/overridetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/google/volteer/variants/volteer2/overridetree.cb | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/volteer/overridetree.cb b/src/mainboard/google/volteer/variants/volteer/overridetree.cb index b4948ec2ba..2ef9fc957a 100644 --- a/src/mainboard/google/volteer/variants/volteer/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer/overridetree.cb @@ -48,6 +48,7 @@ chip soc/intel/tigerlake register "IomTypeCPortPadCfg[1]" = "0x090E000D" device domain 0 on + device pci 05.0 on end # IPU 0x9A19 device pci 15.0 on chip drivers/i2c/generic register "hid" = ""10EC5682"" diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb index 3036a48f21..0bb82f1b37 100644 --- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb @@ -6,6 +6,7 @@ chip soc/intel/tigerlake register "DdiPort2Hpd" = "0" device domain 0 on + device pci 05.0 on end # IPU 0x9A19 device pci 15.0 on chip drivers/i2c/generic register "hid" = ""10EC5682"" |