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authorSven Schnelle <svens@stackframe.org>2011-04-01 07:28:50 +0000
committerSven Schnelle <svens@stackframe.org>2011-04-01 07:28:50 +0000
commit1aba09678913404826d7581f329bfa75d26cbdca (patch)
treeb4dff7a7974c94d11e435f89a9cd9ea1c57b8fd6 /src
parent8a539b6678661891cc750e71ffb3789cb32d0eec (diff)
downloadcoreboot-1aba09678913404826d7581f329bfa75d26cbdca.tar.xz
Add GPIO definitions to PC87392 superio
Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6472 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/superio/nsc/pc87392/pc87392.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/superio/nsc/pc87392/pc87392.h b/src/superio/nsc/pc87392/pc87392.h
index 759f109622..4756351da8 100644
--- a/src/superio/nsc/pc87392/pc87392.h
+++ b/src/superio/nsc/pc87392/pc87392.h
@@ -28,4 +28,15 @@
#define PC87392_GPIO 0x07
#define PC87392_WDT 0x0A
+#define PC87392_GPIO_PIN_OE 0x01
+#define PC87392_GPIO_PIN_TYPE_PUSH_PULL 0x02
+#define PC87392_GPIO_PIN_PULLUP 0x04
+#define PC87392_GPIO_PIN_LOCK 0x08
+#define PC87392_GPIO_PIN_TRIG_LEVEL 0x10
+#define PC87392_GPIO_PIN_TRIG_LOW 0x20
+#define PC87392_GPIO_PIN_DEBOUNCE 0x40
+
+#define PC87392_GPIO_PIN_TRIGGERS_IRQ 0x01
+#define PC87392_GPIO_PIN_TRIGGERS_SMI 0x02
+
#endif