diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-04-28 09:13:21 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-04-30 23:21:11 +0000 |
| commit | 2263e9b8817235223a56a99681b114f640dfc491 (patch) | |
| tree | c245045af288dd1f0930f9084df0f6a04d2a4df1 /src | |
| parent | 5e1c9a9fd6266fa8b04199535e1fbecc84292cda (diff) | |
| download | coreboot-2263e9b8817235223a56a99681b114f640dfc491.tar.xz | |
drivers/i2c/designware: Use safe defaults for SCL parameters
Inspired by discussion in CB:22822.
If I2C bus step response has not been measured, assume the layout to
have been designed with a minimal capacitance and SCL rise and fall
times of 0 ns. The calculations will add the required amount of
reference clocks for the host to drive SCL high or low, such that the
maximum bus frequency specification is met.
Change-Id: Icbafae22c83ffbc16c179fb5412fb4fd6b70813a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52723
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/drivers/i2c/designware/dw_i2c.c | 32 |
1 files changed, 2 insertions, 30 deletions
diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c index c0212c3e27..2e2d20d78c 100644 --- a/src/drivers/i2c/designware/dw_i2c.c +++ b/src/drivers/i2c/designware/dw_i2c.c @@ -621,7 +621,6 @@ int dw_i2c_gen_speed_config(uintptr_t dw_i2c_addr, { const int ic_clk = CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ; struct dw_i2c_regs *regs; - uint16_t hcnt_min, lcnt_min; int i; regs = (struct dw_i2c_regs *)dw_i2c_addr; @@ -637,35 +636,8 @@ int dw_i2c_gen_speed_config(uintptr_t dw_i2c_addr, return 0; } - /* If rise time is set use the time calculation. */ - if (bcfg->rise_time_ns) - return dw_i2c_gen_config_rise_fall_time(regs, speed, bcfg, - ic_clk, config); - - if (speed >= I2C_SPEED_HIGH) { - /* High speed */ - hcnt_min = MIN_HS_SCL_HIGHTIME; - lcnt_min = MIN_HS_SCL_LOWTIME; - } else if (speed >= I2C_SPEED_FAST_PLUS) { - /* Fast-Plus speed */ - hcnt_min = MIN_FP_SCL_HIGHTIME; - lcnt_min = MIN_FP_SCL_LOWTIME; - } else if (speed >= I2C_SPEED_FAST) { - /* Fast speed */ - hcnt_min = MIN_FS_SCL_HIGHTIME; - lcnt_min = MIN_FS_SCL_LOWTIME; - } else { - /* Standard speed */ - hcnt_min = MIN_SS_SCL_HIGHTIME; - lcnt_min = MIN_SS_SCL_LOWTIME; - } - - config->speed = speed; - config->scl_hcnt = ic_clk * hcnt_min / KHz; - config->scl_lcnt = ic_clk * lcnt_min / KHz; - config->sda_hold = ic_clk * DEFAULT_SDA_HOLD_TIME / KHz; - - return 0; + /* Use the time calculation. */ + return dw_i2c_gen_config_rise_fall_time(regs, speed, bcfg, ic_clk, config); } static int dw_i2c_set_speed(unsigned int bus, enum i2c_speed speed, |