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authorStefan Reinauer <stefan.reinauer@coreboot.org>2015-06-19 15:55:49 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-06-23 22:23:27 +0200
commit23ec0a570e11dd9da30641ca1ce4a2d5985b9fb7 (patch)
tree836d1fcac1e64d42c97b40ad8dd012adafda1e2d /src
parent03c6ab5ea6c8191fd0e1dd03e38002946aaefc85 (diff)
downloadcoreboot-23ec0a570e11dd9da30641ca1ce4a2d5985b9fb7.tar.xz
lippert/frontrunner-af: 64bit fixes
Change-Id: Ia764798c8b58497e2b453bd000dd06816c28f98f Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/10600 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/lippert/frontrunner-af/mainboard.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c
index 5a4ee097f8..692e2a6836 100644
--- a/src/mainboard/lippert/frontrunner-af/mainboard.c
+++ b/src/mainboard/lippert/frontrunner-af/mainboard.c
@@ -126,7 +126,7 @@ static void init(struct device *dev)
}
/* Lower SPI speed from default 66 to 22 MHz for SST 25VF032B */
- spi_base = (u8*)(pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x14, 3)), 0xA0) & 0xFFFFFFE0);
+ spi_base = (u8*)((uintptr_t)pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x14, 3)), 0xA0) & 0xFFFFFFE0);
spi_base[0x0D] = (spi_base[0x0D] & ~0x30) | 0x20; // NormSpeed in SPI_Cntrl1 register
/* Notify the SMC we're alive and kicking, or after a while it will