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authorFelix Held <felix-coreboot@felixheld.de>2020-08-27 22:44:47 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-08-31 06:40:01 +0000
commit28668cded436b4d311de2210684f98d97e70707a (patch)
treea193221091aef6e7076ab085711499be52b2c35e /src
parent0d707303ee1d82a8a79b55c37f3d4d7944586820 (diff)
downloadcoreboot-28668cded436b4d311de2210684f98d97e70707a.tar.xz
soc/amd/picasso/southbridge.h: replace GPP_CLK_REQ_MAP_* with macros
Replacing the existing defines with macros makes them easier to use in a function that applies the setting for a certain GPP/GFX clock output. Also add macros for statically enabling or disabling the clock outputs and not only for configuring them as controlled by the #CLK_REQx pins. BUG=b:149970243 BRANCH=zork Change-Id: I14198f224639721fe6ca71ca3dcd9cb413a587d5 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44887 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/picasso/include/soc/southbridge.h17
1 files changed, 5 insertions, 12 deletions
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index 033bcbfdbe..4f06dd7f2e 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -145,18 +145,11 @@
#define GPP_CLK2_REQ_SHL 6
#define GPP_CLK3_REQ_SHL 8
#define GFX_CLK1_REQ_SHL 10
-#define GPP_CLK_REQ_MAP_MASK0 (3 << GPP_CLK0_REQ_SHL)
-#define GPP_CLK_REQ_MAP_CLK0 (1 << GPP_CLK0_REQ_SHL)
-#define GPP_CLK_REQ_MAP_MASK1 (3 << GPP_CLK1_REQ_SHL)
-#define GPP_CLK_REQ_MAP_CLK1 (1 << GPP_CLK1_REQ_SHL)
-#define GFX_CLK_REQ_MAP_MASK0 (3 << GFX_CLK0_REQ_SHL)
-#define GFX_CLK_REQ_MAP_CLK0 (1 << GFX_CLK0_REQ_SHL)
-#define GPP_CLK_REQ_MAP_MASK2 (3 << GPP_CLK2_REQ_SHL)
-#define GPP_CLK_REQ_MAP_CLK2 (1 << GPP_CLK2_REQ_SHL)
-#define GPP_CLK_REQ_MAP_MASK3 (3 << GPP_CLK3_REQ_SHL)
-#define GPP_CLK_REQ_MAP_CLK3 (1 << GPP_CLK3_REQ_SHL)
-#define GFX_CLK_REQ_MAP_MASK1 (3 << GPP_CLK1_REQ_SHL)
-#define GFX_CLK_REQ_MAP_CLK1 (1 << GPP_CLK1_REQ_SHL)
+#define GPP_CLK_REQ_MASK(clk_shift) (0x3 << (clk_shift))
+#define GPP_CLK_REQ_ON(clk_shift) (0x3 << (clk_shift))
+#define GPP_CLK_REQ_EXT(clk_shift) (0x1 << (clk_shift))
+#define GPP_CLK_REQ_OFF(clk_shift) (0x0 << (clk_shift))
+
#define MISC_CGPLL_CONFIG1 0x08
#define CG1PLL_SPREAD_SPECTRUM_ENABLE BIT(0)
#define MISC_CLK_CNTL1 0x40