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authorAngel Pons <th3fanbus@gmail.com>2020-07-07 17:59:14 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-25 10:22:18 +0000
commit31929bf48968845e9824cc0fb37b1bf0e9f7dd77 (patch)
tree379b14db73d3a95a82bc9ae45cb74b5f717916ea /src
parent41b1edf58b46637a2b718fb7ddf5e6ec12da34c1 (diff)
downloadcoreboot-31929bf48968845e9824cc0fb37b1bf0e9f7dd77.tar.xz
soc/intel/baytrail/sd.c: Align with Braswell
This reduces the differences between Bay Trail and Braswell. Tested with BUILD_TIMELESS=1, Google Ninja remains identical. Change-Id: I08ccbc70744a17d589450e321a3ed77d9a56492f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43196 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/baytrail/sd.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/src/soc/intel/baytrail/sd.c b/src/soc/intel/baytrail/sd.c
index 57cd8f4d1e..34a90317ea 100644
--- a/src/soc/intel/baytrail/sd.c
+++ b/src/soc/intel/baytrail/sd.c
@@ -12,9 +12,9 @@
#include <soc/ramstage.h>
#include "chip.h"
-#define CAP_OVERRIDE_LOW 0xa0
-#define CAP_OVERRIDE_HIGH 0xa4
-# define USE_CAP_OVERRIDES (1 << 31)
+#define CAP_OVERRIDE_LOW 0xa0
+#define CAP_OVERRIDE_HIGH 0xa4
+#define USE_CAP_OVERRIDES (1 << 31)
static void sd_init(struct device *dev)
{
@@ -22,10 +22,9 @@ static void sd_init(struct device *dev)
if (config->sdcard_cap_low != 0 || config->sdcard_cap_high != 0) {
printk(BIOS_DEBUG, "Overriding SD Card controller caps.\n");
- pci_write_config32(dev, CAP_OVERRIDE_LOW,
- config->sdcard_cap_low);
- pci_write_config32(dev, CAP_OVERRIDE_HIGH,
- config->sdcard_cap_high | USE_CAP_OVERRIDES);
+ pci_write_config32(dev, CAP_OVERRIDE_LOW, config->sdcard_cap_low);
+ pci_write_config32(dev, CAP_OVERRIDE_HIGH, config->sdcard_cap_high |
+ USE_CAP_OVERRIDES);
}
if (config->scc_acpi_mode)