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| author | Angel Pons <th3fanbus@gmail.com> | 2021-02-10 10:11:58 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-12 07:52:37 +0000 |
| commit | 352902407164e58874d48dd2b81680e65c7f9dfc (patch) | |
| tree | 237b167dc813e2fd263b443f82832fc957a50415 /src | |
| parent | f95b9b4b092837663b6fa1cf42ce312338dee5c3 (diff) | |
| download | coreboot-352902407164e58874d48dd2b81680e65c7f9dfc.tar.xz | |
nb/intel/common/fixed_bars.h: Add casts to `uintptr_t`
64-bit builds need this, as the Kconfig values fit in a 32-bit integer.
Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.
Change-Id: I570374f92394f839a97e28fabc8fa07a7e673e83
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50469
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/intel/common/fixed_bars.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/northbridge/intel/common/fixed_bars.h b/src/northbridge/intel/common/fixed_bars.h index d1b005bfae..e149d2282b 100644 --- a/src/northbridge/intel/common/fixed_bars.h +++ b/src/northbridge/intel/common/fixed_bars.h @@ -9,16 +9,16 @@ _Static_assert(CONFIG_FIXED_EPBAR_MMIO_BASE != 0, "EPBAR base address is zero" #include <stdint.h> -#define MCHBAR8(x) (*((volatile u8 *)(CONFIG_FIXED_MCHBAR_MMIO_BASE + (x)))) -#define MCHBAR16(x) (*((volatile u16 *)(CONFIG_FIXED_MCHBAR_MMIO_BASE + (x)))) -#define MCHBAR32(x) (*((volatile u32 *)(CONFIG_FIXED_MCHBAR_MMIO_BASE + (x)))) +#define MCHBAR8(x) (*((volatile u8 *)((uintptr_t)CONFIG_FIXED_MCHBAR_MMIO_BASE + (x)))) +#define MCHBAR16(x) (*((volatile u16 *)((uintptr_t)CONFIG_FIXED_MCHBAR_MMIO_BASE + (x)))) +#define MCHBAR32(x) (*((volatile u32 *)((uintptr_t)CONFIG_FIXED_MCHBAR_MMIO_BASE + (x)))) -#define DMIBAR8(x) (*((volatile u8 *)(CONFIG_FIXED_DMIBAR_MMIO_BASE + (x)))) -#define DMIBAR16(x) (*((volatile u16 *)(CONFIG_FIXED_DMIBAR_MMIO_BASE + (x)))) -#define DMIBAR32(x) (*((volatile u32 *)(CONFIG_FIXED_DMIBAR_MMIO_BASE + (x)))) +#define DMIBAR8(x) (*((volatile u8 *)((uintptr_t)CONFIG_FIXED_DMIBAR_MMIO_BASE + (x)))) +#define DMIBAR16(x) (*((volatile u16 *)((uintptr_t)CONFIG_FIXED_DMIBAR_MMIO_BASE + (x)))) +#define DMIBAR32(x) (*((volatile u32 *)((uintptr_t)CONFIG_FIXED_DMIBAR_MMIO_BASE + (x)))) -#define EPBAR8(x) (*((volatile u8 *)(CONFIG_FIXED_EPBAR_MMIO_BASE + (x)))) -#define EPBAR16(x) (*((volatile u16 *)(CONFIG_FIXED_EPBAR_MMIO_BASE + (x)))) -#define EPBAR32(x) (*((volatile u32 *)(CONFIG_FIXED_EPBAR_MMIO_BASE + (x)))) +#define EPBAR8(x) (*((volatile u8 *)((uintptr_t)CONFIG_FIXED_EPBAR_MMIO_BASE + (x)))) +#define EPBAR16(x) (*((volatile u16 *)((uintptr_t)CONFIG_FIXED_EPBAR_MMIO_BASE + (x)))) +#define EPBAR32(x) (*((volatile u32 *)((uintptr_t)CONFIG_FIXED_EPBAR_MMIO_BASE + (x)))) #endif /* ! NORTHBRIDGE_INTEL_COMMON_FIXED_BARS_H */ |