diff options
author | Tan, Lean Sheng <lean.sheng.tan@intel.com> | 2020-12-10 09:55:15 -0800 |
---|---|---|
committer | Werner Zeh <werner.zeh@siemens.com> | 2020-12-14 05:46:29 +0000 |
commit | 36b45f6cef03f5a638bbf00001784924f95a9b77 (patch) | |
tree | 330c4b0a94274bcae74b33a854816d777f901202 /src | |
parent | 7d6df608ff03ce67b3883605f050fe22d0f014de (diff) | |
download | coreboot-36b45f6cef03f5a638bbf00001784924f95a9b77.tar.xz |
soc/intel/elkhartlake: Update USB_PORT_MID pin settings
Update Pre-emphasis, Transmitter Emphasis & Preemphasis Bias values
for USB_PORT_MID.
Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: I43eeb0fc410197a559df97b340135fac65c00aa5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48541
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/intel/elkhartlake/include/soc/usb.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/elkhartlake/include/soc/usb.h b/src/soc/intel/elkhartlake/include/soc/usb.h index 247b0ba554..3cef823ea4 100644 --- a/src/soc/intel/elkhartlake/include/soc/usb.h +++ b/src/soc/intel/elkhartlake/include/soc/usb.h @@ -79,9 +79,9 @@ enum { .enable = 1, \ .ocpin = (pin), \ .tx_bias = USB2_BIAS_0MV, \ - .tx_emp_enable = USB2_PRE_EMP_ON, \ - .pre_emp_bias = USB2_BIAS_56P3MV, \ - .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, \ + .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON, \ + .pre_emp_bias = USB2_BIAS_45MV, \ + .pre_emp_bit = USB2_FULL_BIT_PRE_EMP, \ } /* Length = 3"-5.99" */ |