summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorNico Huber <nico.h@gmx.de>2013-05-26 19:37:47 +0200
committerRonald G. Minnich <rminnich@gmail.com>2013-06-19 17:59:50 +0200
commit44c392f8c27a019ac0ac076c2e6b16d55c624c3b (patch)
treee028047daedd6a278530724345eef377e0cb5ff8 /src
parent9359f2de0033cfb47fab01b2c73ae36408281fbb (diff)
downloadcoreboot-44c392f8c27a019ac0ac076c2e6b16d55c624c3b.tar.xz
lenovo/t60: Collect timestamps in romstage
Collect early timestamps in T60's romstage like some newer boards do. This should also work on X60s (and other ICH7 based systems with EARLY_CBMEM_INIT). Change-Id: I3b2872dd7423f3379ff3b68ad999523ec35fc08e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: http://review.coreboot.org/3499 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/lenovo/t60/romstage.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c
index 16971fc44f..5bb7ac16d1 100644
--- a/src/mainboard/lenovo/t60/romstage.c
+++ b/src/mainboard/lenovo/t60/romstage.c
@@ -30,6 +30,7 @@
#include <cpu/x86/lapic.h>
#include <lib.h>
#include <cbmem.h>
+#include <timestamp.h>
#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include <cpu/x86/bist.h>
@@ -211,6 +212,20 @@ void main(unsigned long bist)
int cbmem_was_initted;
const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0x52, 0x51, 0x53 };
+#if CONFIG_COLLECT_TIMESTAMPS
+ tsc_t start_romstage_time;
+ tsc_t before_dram_time;
+ tsc_t after_dram_time;
+ tsc_t base_time = {
+ .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc),
+ .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0)
+ };
+#endif
+
+#if CONFIG_COLLECT_TIMESTAMPS
+ start_romstage_time = rdtsc();
+#endif
+
if (bist == 0)
enable_lapic();
@@ -279,7 +294,13 @@ void main(unsigned long bist)
dump_spd_registers();
#endif
+#if CONFIG_COLLECT_TIMESTAMPS
+ before_dram_time = rdtsc();
+#endif
sdram_initialize(boot_mode, spd_addrmap);
+#if CONFIG_COLLECT_TIMESTAMPS
+ after_dram_time = rdtsc();
+#endif
/* Perform some initialization that must run before stage2 */
early_ich7_init();
@@ -336,6 +357,14 @@ void main(unsigned long bist)
}
#endif
+#if CONFIG_COLLECT_TIMESTAMPS
+ timestamp_init(base_time);
+ timestamp_add(TS_START_ROMSTAGE, start_romstage_time );
+ timestamp_add(TS_BEFORE_INITRAM, before_dram_time );
+ timestamp_add(TS_AFTER_INITRAM, after_dram_time );
+ timestamp_add_now(TS_END_ROMSTAGE);
+#endif
+
#if CONFIG_CONSOLE_CBMEM
/* Keep this the last thing this function does. */
cbmemc_reinit();