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| author | Marc Jones <marc.jones@se-eng.com> | 2012-07-02 22:31:22 -0600 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-07-24 22:48:07 +0200 |
| commit | 48c6bae1f2cc1dc1996c36986b7a87273f48b64e (patch) | |
| tree | 9c632f5f5a51741a42f7143ef2f1c7c069dc4934 /src | |
| parent | 39fea6e2a87aa79e6b156c96f0b2ba3ae9a35ba2 (diff) | |
| download | coreboot-48c6bae1f2cc1dc1996c36986b7a87273f48b64e.tar.xz | |
Add BAR address debug information to Oxford PCIe serial driver
The Oxford PCIE Serial card has a hardcoded address at setup,
which may be moved during PCI Init. The driver re-initializes
after PCI init. Add a debug print for the new BAR address.
Initializing Oxford OXPCIe952
OXPCIe952: Class=70002 Revision ID=0
OXPCIe952: 2 UARTs detected.
OXPCIe952: Uart Bar: 0xe0800000
Change-Id: I1858d3eba09749cba3c3869060d00e621dca112a
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/1327
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/drivers/oxford/oxpcie/oxpcie.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/drivers/oxford/oxpcie/oxpcie.c b/src/drivers/oxford/oxpcie/oxpcie.c index 8afdd1f74e..5ce4f62cf6 100644 --- a/src/drivers/oxford/oxpcie/oxpcie.c +++ b/src/drivers/oxford/oxpcie/oxpcie.c @@ -38,6 +38,7 @@ static void oxford_oxpcie_enable(device_t dev) (read32(res->base) >> 8), (read32(res->base) & 0xff)); printk(BIOS_DEBUG, "OXPCIe952: %d UARTs detected.\n", (read32(res->base + 4) & 3)); + printk(BIOS_DEBUG, "OXPCIe952: UART BAR: 0x%x\n", (u32)res->base); } |