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authorSubrata Banik <subrata.banik@intel.com>2017-04-24 11:54:34 +0530
committerMartin Roth <martinroth@google.com>2017-05-05 23:29:01 +0200
commit4aaa7e35f5eaa0a97f0564406e8e2ad1398fa740 (patch)
treeb0d8259c0767d06cd4b752827c385a42f11ded56 /src
parent23ccb0de3cb2177b10c23e334ca11f133c675564 (diff)
downloadcoreboot-4aaa7e35f5eaa0a97f0564406e8e2ad1398fa740.tar.xz
soc/intel/apollolake: Use XDCI common code
This patch performs apollolake specific XDCI controller initialization. Change-Id: I4649bffe1bb90d7df6a72b5334793bf8f0fdbaeb Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/19429 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/apollolake/Kconfig1
-rw-r--r--src/soc/intel/apollolake/include/soc/pci_ids.h1
-rw-r--r--src/soc/intel/apollolake/xdci.c25
3 files changed, 7 insertions, 20 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 20699c0a9d..5e800a315f 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -62,6 +62,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_RTC
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_UART
+ select SOC_INTEL_COMMON_BLOCK_XDCI
select SOC_INTEL_COMMON_BLOCK_XHCI
select SOC_INTEL_COMMON_LPSS_I2C
select SOC_INTEL_COMMON_SMI
diff --git a/src/soc/intel/apollolake/include/soc/pci_ids.h b/src/soc/intel/apollolake/include/soc/pci_ids.h
index 1621fcd0ef..8e1ac9f5cf 100644
--- a/src/soc/intel/apollolake/include/soc/pci_ids.h
+++ b/src/soc/intel/apollolake/include/soc/pci_ids.h
@@ -27,7 +27,6 @@
#define PCI_DEVICE_ID_APOLLOLAKE_SRAM 0x5aec /* 00:0d.3 */
#define PCI_DEVICE_ID_APOLLOLAKE_AUDIO 0x5a98 /* 00:0e.0 */
#define PCI_DEVICE_ID_APOLLOLAKE_SATA 0x5ae0 /* 00:12.0 */
-#define PCI_DEVICE_ID_APOLLOLAKE_XDCI 0x5aaa /* 00:15.1 */
#define PCI_DEVICE_ID_APOLLOLAKE_I2C0 0x5aac /* 00:16.0 */
#define PCI_DEVICE_ID_APOLLOLAKE_I2C1 0x5aae /* 00:16.1 */
#define PCI_DEVICE_ID_APOLLOLAKE_I2C2 0x5ab0 /* 00:16.2 */
diff --git a/src/soc/intel/apollolake/xdci.c b/src/soc/intel/apollolake/xdci.c
index 22abec9f68..2578fa0f5b 100644
--- a/src/soc/intel/apollolake/xdci.c
+++ b/src/soc/intel/apollolake/xdci.c
@@ -17,9 +17,8 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_ids.h>
+#include <intelblocks/xdci.h>
#include <soc/pci_devs.h>
-#include <soc/pci_ids.h>
#include <timer.h>
#define DUAL_ROLE_CFG0 0x80d8
@@ -48,19 +47,19 @@ static void configure_host_mode_port0(struct device *dev)
const struct resource *res;
uint32_t reg;
struct stopwatch sw;
- struct device *xhci_dev = PCH_DEV_XHCI;
+ struct device *xdci_dev = PCH_DEV_XDCI;
/*
* Only default to host mode if the xdci device is present and
* enabled. If it's disabled assume the switch was already done
* in FSP.
*/
- if (!dev->enabled || !xhci_dev->enabled)
+ if (!dev->enabled || !xdci_dev->enabled)
return;
printk(BIOS_INFO, "Putting port 0 into host mode.\n");
- res = find_resource(xhci_dev, PCI_BASE_ADDRESS_0);
+ res = find_resource(xdci_dev, PCI_BASE_ADDRESS_0);
cfg0 = (void *)(uintptr_t)(res->base + DUAL_ROLE_CFG0);
cfg1 = (void *)(uintptr_t)(res->base + DUAL_ROLE_CFG1);
@@ -82,24 +81,12 @@ static void configure_host_mode_port0(struct device *dev)
}
}
- printk(BIOS_INFO, "XHCI port 0 host switch over took %lu ms\n",
+ printk(BIOS_INFO, "XDCI port 0 host switch over took %lu ms\n",
stopwatch_duration_msecs(&sw));
}
-static void xdci_init(struct device *dev)
+void soc_xdci_init(struct device *dev)
{
configure_host_mode_port0(dev);
}
-static const struct device_operations device_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = xdci_init,
-};
-
-static const struct pci_driver pmc __pci_driver = {
- .ops = &device_ops,
- .vendor = PCI_VENDOR_ID_INTEL,
- .device = PCI_DEVICE_ID_APOLLOLAKE_XDCI,
-};