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authorPatrick Rudolph <siro@das-labor.org>2017-09-22 15:19:26 +0200
committerMartin Roth <martinroth@google.com>2017-09-27 16:41:49 +0000
commit5a061852b2abbefaa5eb7cc4bc0e311e6c2ccc04 (patch)
tree7da64e02b8409bdb4731661a1d77257dc1663456 /src
parent3b2712d757190d868f625d5bca51230ceb351270 (diff)
downloadcoreboot-5a061852b2abbefaa5eb7cc4bc0e311e6c2ccc04.tar.xz
nb/intel/sandybridge/raminit: Improve readability
Add debug messages for SPD probing. Change-Id: I722102b7981781b88cdc4877f698294eb719ff32 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/21638 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 2854a2b0d7..bdba7489c0 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -209,6 +209,9 @@ static void dram_find_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl)
/* count dimms on channel */
for (slot = 0; slot < NUM_SLOTS; slot++) {
spd_slot = 2 * channel + slot;
+ printk(BIOS_DEBUG,
+ "SPD probe channel%d, slot%d\n", channel, slot);
+
spd_decode_ddr3(&dimm->dimm[channel][slot], spd[spd_slot]);
if (dimm->dimm[channel][slot].dram_type == SPD_MEMORY_TYPE_SDRAM_DDR3)
dimms_on_channel++;
@@ -216,6 +219,9 @@ static void dram_find_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl)
for (slot = 0; slot < NUM_SLOTS; slot++) {
spd_slot = 2 * channel + slot;
+ printk(BIOS_DEBUG,
+ "SPD probe channel%d, slot%d\n", channel, slot);
+
/* search for XMP profile */
spd_xmp_decode_ddr3(&dimm->dimm[channel][slot],
spd[spd_slot],