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authorMartin Roth <gaumless@gmail.com>2015-06-24 19:04:16 -0600
committerMartin Roth <gaumless@gmail.com>2015-06-25 20:25:30 +0200
commit5fe62efb77a2ecfeecdcc526404712b816e74693 (patch)
treeb59e5cd3bdfd14539c5338a42527c4247b11a00b /src
parent3ad1f1ca5fb35d698359c88baaa57939a258639a (diff)
downloadcoreboot-5fe62efb77a2ecfeecdcc526404712b816e74693.tar.xz
soc/intel/common/Kconfig: Fix warning & whitespace
Because of a missing close quote, we have the warning: src/soc/intel/common/Kconfig:52:warning:multi-line strings not supported This was added in commit 0946ec37 -Intel Common SOC:Add romstage support The whitespace issue - using spaces instead of a leading tab was added in the same commit. Change-Id: I429c66afb5a7e10ca0e0ef619ac46722c63fb376 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10654 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/common/Kconfig4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index 7b88d55044..75e585d70a 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -40,7 +40,7 @@ config CHIPSET_RESERVED_MEM_BYTES
hex "Size in bytes of chipset reserved memory area"
default 0
help
- If insufficient documentation is available to determine the size of
+ If insufficient documentation is available to determine the size of
the chipset reserved memory area by walking the chipset registers,
the CHIPSET_RESERVED_MEM_BYTES may be used as a workaround to account
for the missing pieces of memory. The value specified in bytes is:
@@ -49,7 +49,7 @@ config CHIPSET_RESERVED_MEM_BYTES
by reading chipset registers)
config DISPLAY_MTRRS
- bool "MTRRs: Display the MTRR settings
+ bool "MTRRs: Display the MTRR settings"
default n
config DISPLAY_SMM_MEMORY_MAP