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authorAlexander Couzens <lynxis@fe80.eu>2015-01-27 11:57:43 +0100
committerPeter Stuge <peter@stuge.se>2015-04-05 03:25:45 +0200
commit60d44dd0a436eee2c7f3e9cf5a572163cfbd9a80 (patch)
tree46dcec5206dc693a805be14ffc1c1d8e9a54c68b /src
parent56b830938af3638538558ba92ac6c168b6a217ef (diff)
downloadcoreboot-60d44dd0a436eee2c7f3e9cf5a572163cfbd9a80.tar.xz
intel/nehalem: rename copypasted smi finalizer function
The nehalem smi finalize handler was just copied from sandybridge, without even changing the function name. TEST=Built and tested on x201t with additional patch to use finalizers Change-Id: Ifb44eeaaa6e03556deeb5d12ed1147e02d6d6eb9 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/8292 Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/lenovo/x201/smihandler.c4
-rw-r--r--src/mainboard/packardbell/ms2290/smihandler.c4
-rw-r--r--src/northbridge/intel/nehalem/finalize.c2
-rw-r--r--src/northbridge/intel/nehalem/nehalem.h2
4 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/lenovo/x201/smihandler.c b/src/mainboard/lenovo/x201/smihandler.c
index 7af613bb39..d8e78072fd 100644
--- a/src/mainboard/lenovo/x201/smihandler.c
+++ b/src/mainboard/lenovo/x201/smihandler.c
@@ -25,7 +25,7 @@
#include "southbridge/intel/ibexpeak/nvs.h"
#include "southbridge/intel/ibexpeak/pch.h"
#include "southbridge/intel/ibexpeak/me.h"
-#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <northbridge/intel/nehalem/nehalem.h>
#include <cpu/intel/model_2065x/model_2065x.h>
#include <ec/acpi/ec.h>
#include <pc80/mc146818rtc.h>
@@ -164,7 +164,7 @@ int mainboard_smi_apmc(u8 data)
intel_me_finalize_smm();
intel_pch_finalize_smm();
- intel_sandybridge_finalize_smm();
+ intel_nehalem_finalize_smm();
intel_model_2065x_finalize_smm();
mainboard_finalized = 1;
diff --git a/src/mainboard/packardbell/ms2290/smihandler.c b/src/mainboard/packardbell/ms2290/smihandler.c
index f04ff9028b..bbe1597688 100644
--- a/src/mainboard/packardbell/ms2290/smihandler.c
+++ b/src/mainboard/packardbell/ms2290/smihandler.c
@@ -25,7 +25,7 @@
#include "southbridge/intel/ibexpeak/nvs.h"
#include "southbridge/intel/ibexpeak/pch.h"
#include "southbridge/intel/ibexpeak/me.h"
-#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <northbridge/intel/nehalem/nehalem.h>
#include <cpu/intel/model_2065x/model_2065x.h>
#include <ec/acpi/ec.h>
#include <pc80/mc146818rtc.h>
@@ -88,7 +88,7 @@ int mainboard_smi_apmc(u8 data)
intel_me_finalize_smm();
intel_pch_finalize_smm();
- intel_sandybridge_finalize_smm();
+ intel_nehalem_finalize_smm();
intel_model_2065x_finalize_smm();
mainboard_finalized = 1;
diff --git a/src/northbridge/intel/nehalem/finalize.c b/src/northbridge/intel/nehalem/finalize.c
index 401d9ecb99..72baa4869b 100644
--- a/src/northbridge/intel/nehalem/finalize.c
+++ b/src/northbridge/intel/nehalem/finalize.c
@@ -24,7 +24,7 @@
#define PCI_DEV_SNB PCI_DEV(0, 0, 0)
-void intel_sandybridge_finalize_smm(void)
+void intel_nehalem_finalize_smm(void)
{
pcie_or_config16(PCI_DEV_SNB, 0x50, 1 << 0); /* GGC */
pcie_or_config32(PCI_DEV_SNB, 0x5c, 1 << 0); /* DPR */
diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h
index b90e5a910d..2218433b7d 100644
--- a/src/northbridge/intel/nehalem/nehalem.h
+++ b/src/northbridge/intel/nehalem/nehalem.h
@@ -593,7 +593,7 @@ struct ied_header {
#define PCI_DEVICE_ID_IB 0x0154
#ifdef __SMM__
-void intel_sandybridge_finalize_smm(void);
+void intel_nehalem_finalize_smm(void);
#else /* !__SMM__ */
int bridge_silicon_revision(void);
void nehalem_early_initialization(int chipset_type);