diff options
author | T Michael Turney <mturney@codeaurora.org> | 2019-10-22 06:26:21 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-05 17:57:24 +0000 |
commit | 655220ae69b553e600d6225b550f045e9b212638 (patch) | |
tree | 4c8aa5c204ec9152a88154e206817dff179bf951 /src | |
parent | 050be72e77fb5beaf0882c9abaf1ce9a571231dc (diff) | |
download | coreboot-655220ae69b553e600d6225b550f045e9b212638.tar.xz |
trogdor: Add mainboard USB support
Change-Id: I126d1d6b582ea95c97ac55784d44d3081aabdae7
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36232
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/trogdor/mainboard.c | 14 | ||||
-rw-r--r-- | src/mainboard/google/trogdor/romstage.c | 12 |
2 files changed, 25 insertions, 1 deletions
diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c index 42af265cd9..63fac19984 100644 --- a/src/mainboard/google/trogdor/mainboard.c +++ b/src/mainboard/google/trogdor/mainboard.c @@ -18,10 +18,22 @@ #include <device/mmio.h> #include <gpio.h> #include <timestamp.h> +#include <soc/usb.h> -static void mainboard_init(struct device *dev) +static struct usb_board_data usb0_board_data = { + .pll_bias_control_2 = 0x22, + .imp_ctrl1 = 0x08, + .port_tune1 = 0xc5, +}; + +static void setup_usb(void) { + setup_usb_host0(&usb0_board_data); +} +static void mainboard_init(struct device *dev) +{ + setup_usb(); } static void mainboard_enable(struct device *dev) diff --git a/src/mainboard/google/trogdor/romstage.c b/src/mainboard/google/trogdor/romstage.c index 718538728c..872798a791 100644 --- a/src/mainboard/google/trogdor/romstage.c +++ b/src/mainboard/google/trogdor/romstage.c @@ -14,10 +14,22 @@ */ #include <arch/stages.h> +#include <soc/usb.h> #include <soc/qclib_common.h> +static void prepare_usb(void) +{ + /* + * Do DWC3 core and phy reset. Kick these resets + * off early so they get at least 1ms to settle. + */ + reset_usb0(); +} + void platform_romstage_main(void) { + prepare_usb(); + /* QCLib: DDR init & train */ qclib_load_and_run(); } |