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authorKeith Hui <buurin@gmail.com>2017-10-29 23:24:31 -0400
committerMartin Roth <martinroth@google.com>2017-11-04 00:28:28 +0000
commit6b06abb461e23bcebe08f2d19d0ae79adf9f512e (patch)
treeb41cdec39e24f9b7b16bae95c056c539002829d0 /src
parent44e2abf38ff6da6504f29f69904869cf38724ba7 (diff)
downloadcoreboot-6b06abb461e23bcebe08f2d19d0ae79adf9f512e.tar.xz
asus/p2b: Move to EARLY_CBMEM_INIT
Change-Id: I0bf4d6318ade6e931db4f8b1af08db1f9f93c313 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/22228 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/asus/p2b/Kconfig1
-rw-r--r--src/mainboard/asus/p2b/romstage.c2
2 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/asus/p2b/Kconfig b/src/mainboard/asus/p2b/Kconfig
index f2e85b6b86..6b934a5fa9 100644
--- a/src/mainboard/asus/p2b/Kconfig
+++ b/src/mainboard/asus/p2b/Kconfig
@@ -18,7 +18,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select CPU_INTEL_SLOT_1
select NORTHBRIDGE_INTEL_I440BX
- select LATE_CBMEM_INIT
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
select HAVE_PIRQ_TABLE
diff --git a/src/mainboard/asus/p2b/romstage.c b/src/mainboard/asus/p2b/romstage.c
index 70e4323281..ccf39e6790 100644
--- a/src/mainboard/asus/p2b/romstage.c
+++ b/src/mainboard/asus/p2b/romstage.c
@@ -24,6 +24,7 @@
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83977tf/w83977tf.h>
#include <lib.h>
+#include <cbmem.h>
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
@@ -40,4 +41,5 @@ void mainboard_romstage_entry(unsigned long bist)
enable_smbus();
sdram_initialize();
+ cbmem_initialize_empty();
}