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authorAaron Durbin <adurbin@chromium.org>2017-11-03 12:46:26 -0600
committerAaron Durbin <adurbin@chromium.org>2017-11-06 16:10:45 +0000
commit733ad92c65d76b972dc52ef3c60bad974204b1dd (patch)
tree3f461ea43060e0357346885440e063a3fea01437 /src
parent6d53c6bc6a248439de78d498a13441a6925ab713 (diff)
downloadcoreboot-733ad92c65d76b972dc52ef3c60bad974204b1dd.tar.xz
soc/amd/stoneyridge: start header file for iomap
Create a new header file, iomap.h, which serves as a single place for providing the address space definitions. Remove the amd_defs.h file that had a single define in it. Change-Id: I1b1aaa8c5d60d670c272ac7131faeb6b3edc1968 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/22318 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/gpio.h2
-rw-r--r--src/soc/amd/stoneyridge/include/soc/iomap.h (renamed from src/soc/amd/common/amd_defs.h)8
2 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h
index 734074aad6..0854cf3d96 100644
--- a/src/soc/amd/stoneyridge/include/soc/gpio.h
+++ b/src/soc/amd/stoneyridge/include/soc/gpio.h
@@ -20,7 +20,7 @@
#define GPIO_DEVICE_DESC "GPIO Controller"
#ifndef __ACPI__
-#include <soc/amd/common/amd_defs.h>
+#include <soc/iomap.h>
#include <types.h>
#define GPIO_PIN_STS (1 << 16)
diff --git a/src/soc/amd/common/amd_defs.h b/src/soc/amd/stoneyridge/include/soc/iomap.h
index e4ce1dba22..d0c3f3e9d4 100644
--- a/src/soc/amd/common/amd_defs.h
+++ b/src/soc/amd/stoneyridge/include/soc/iomap.h
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Raptor Engineering, LLC
+ * Copyright 2017 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -13,10 +14,9 @@
* GNU General Public License for more details.
*/
-
-#ifndef __AMD_SB_DEFS_H__
-#define __AMD_SB_DEFS_H__
+#ifndef __SOC_STONEYRIDGE_IOMAP_H__
+#define __SOC_STONEYRIDGE_IOMAP_H__
#define AMD_SB_ACPI_MMIO_ADDR 0xfed80000ul
-#endif
+#endif /* __SOC_STONEYRIDGE_IOMAP_H__ */