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authorAngel Pons <th3fanbus@gmail.com>2021-04-21 16:55:27 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-04-23 14:44:27 +0000
commit8122b3f6123158024ed2844af17289a9abb98036 (patch)
treec3e7a0b1170b7467ac7b5e33c5cb945058281160 /src
parent17160ffdb4ce3f96781c9d305e692a553e08eaf3 (diff)
downloadcoreboot-8122b3f6123158024ed2844af17289a9abb98036.tar.xz
soc/intel/xeon_sp: Fix devices list in the DMAR DRHD structure
The VT-d specification states that device scope for remapping hardware unit which has DRHD_INCLUDE_PCI_ALL flags must be the last in the list of hardware unit definition structure. This change fixes the devices list in the DMAR DRHD structure. Change-Id: Ia5fedb6148409f9c72848c9e227e19bedebb5823 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52572 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/xeon_sp/nb_acpi.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/src/soc/intel/xeon_sp/nb_acpi.c b/src/soc/intel/xeon_sp/nb_acpi.c
index 19c3921ce7..3b2fba964f 100644
--- a/src/soc/intel/xeon_sp/nb_acpi.c
+++ b/src/soc/intel/xeon_sp/nb_acpi.c
@@ -198,19 +198,6 @@ static unsigned long acpi_create_drhd(unsigned long current, int socket,
if (!reg_base)
return current;
- // Add DRHD Hardware Unit
- if (socket == 0 && stack == CSTACK) {
- printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
- "Register Base Address: 0x%x\n",
- DRHD_INCLUDE_PCI_ALL, pcie_seg, reg_base);
- current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL,
- pcie_seg, reg_base);
- } else {
- printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
- "Register Base Address: 0x%x\n", 0, pcie_seg, reg_base);
- current += acpi_create_dmar_drhd(current, 0, pcie_seg, reg_base);
- }
-
// Add PCH IOAPIC
if (socket == 0 && stack == CSTACK) {
union p2sb_bdf ioapic_bdf = p2sb_get_ioapic_bdf();
@@ -276,6 +263,19 @@ static unsigned long acpi_create_drhd(unsigned long current, int socket,
}
}
+ // Add DRHD Hardware Unit
+ if (socket == 0 && stack == CSTACK) {
+ printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
+ "Register Base Address: 0x%x\n",
+ DRHD_INCLUDE_PCI_ALL, pcie_seg, reg_base);
+ current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL,
+ pcie_seg, reg_base);
+ } else {
+ printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
+ "Register Base Address: 0x%x\n", 0, pcie_seg, reg_base);
+ current += acpi_create_dmar_drhd(current, 0, pcie_seg, reg_base);
+ }
+
acpi_dmar_drhd_fixup(tmp, current);
return current;