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authorEric Biederman <ebiederm@xmission.com>2003-04-24 23:25:29 +0000
committerEric Biederman <ebiederm@xmission.com>2003-04-24 23:25:29 +0000
commit825dd3361bd30de3bae3f33d467441e82dacc757 (patch)
tree4ee696c5d466a9fab8ef60bd485ad51048d13cda /src
parent497eb854415a0e54609fc747321c75b81c7df7c6 (diff)
downloadcoreboot-825dd3361bd30de3bae3f33d467441e82dacc757.tar.xz
- simple bug fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@798 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/amd/solo/auto.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/amd/solo/auto.c b/src/mainboard/amd/solo/auto.c
index bc549fac90..d435c63e68 100644
--- a/src/mainboard/amd/solo/auto.c
+++ b/src/mainboard/amd/solo/auto.c
@@ -331,13 +331,13 @@ static void sdram_set_registers(void)
* that define the end of the DRAM region.
*/
0xC144, 0x0000f8f8, 0x003f0000,
- 0xC148, 0x0000f8f8, 0x00000001,
+ 0xC14C, 0x0000f8f8, 0x00000001,
0xC154, 0x0000f8f8, 0x00000002,
- 0xC158, 0x0000f8f8, 0x00000003,
+ 0xC15C, 0x0000f8f8, 0x00000003,
0xC164, 0x0000f8f8, 0x00000004,
- 0xC168, 0x0000f8f8, 0x00000005,
+ 0xC16C, 0x0000f8f8, 0x00000005,
0xC174, 0x0000f8f8, 0x00000006,
- 0xC178, 0x0000f8f8, 0x00000007,
+ 0xC17C, 0x0000f8f8, 0x00000007,
/* DRAM Base i Registers
* F1:0x40 i = 0
* F1:0x48 i = 1
@@ -451,7 +451,7 @@ static void sdram_set_registers(void)
0xC198, 0x000000f0, 0x00000000,
0xC1A0, 0x000000f0, 0x00000000,
0xC1A8, 0x000000f0, 0x00000000,
- 0xC1B0, 0x000000f0, 0x0000a003,
+ 0xC1B0, 0x000000f0, 0x00000a03,
0xC1B8, 0x000000f0, 0x00400003,
/* PCI I/O Limit i Registers