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authorHannah Williams <hannah.williams@intel.com>2018-03-31 18:23:20 -0700
committerAaron Durbin <adurbin@chromium.org>2018-04-02 17:36:56 +0000
commit8dce5bcca5cdb2c34f394508ce5c9b63bf063ae8 (patch)
tree822aa7857e44c5919b3ab760f03db00872d96556 /src
parentd6630d1165c844913325a0c36ab6352a33622c7e (diff)
downloadcoreboot-8dce5bcca5cdb2c34f394508ce5c9b63bf063ae8.tar.xz
mb/google/octopus: Make PMC I2C pads IOSTANDBY_IGNORE
This fixes wake from S0ix Change-Id: I3b340deafccbf909ec1f4b11ba9a77c6b13a89fd Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/25467 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/octopus/variants/baseboard/gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c
index 8ce0e89a2b..225ab24f67 100644
--- a/src/mainboard/google/octopus/variants/baseboard/gpio.c
+++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c
@@ -72,8 +72,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_45, UP_20K, DEEP, NF1, TxDRxE, ENPU), /* USB_OC1_B */
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_46, 0, DEEP, DN_20K, HIZCRx0, DISPUPD), /* DSI_I2C_SDA */
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_47, 0, DEEP, DN_20K, HIZCRx0, DISPUPD), /* DSI_I2C_SCL */
- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_48, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* PMC_I2C_SDA */
- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_49, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* PMC_I2C_SCL */
+ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_48, NONE, DEEP, NF1), /* PMC_I2C_SDA */
+ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_49, NONE, DEEP, NF1), /* PMC_I2C_SCL */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_50, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C0_SDA */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_51, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C0_SCL */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_52, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C1_SDA */