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authorNick Vaccaro <nvaccaro@chromium.org>2018-01-10 10:47:51 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2018-01-11 01:10:47 +0000
commit90137e31068a576d6e4cf41aa100ace57a61c1b2 (patch)
tree11764933d9ad24c91911e069d1666a84455ba7d8 /src
parent6603c01dd3652295c576725c57f0039573bad204 (diff)
downloadcoreboot-90137e31068a576d6e4cf41aa100ace57a61c1b2.tar.xz
mainboard/google/zoombini: map EC io space in devicetree.cb
BUG=b:64395641 BRANCH=none TEST=none Change-Id: I92969384cd32766be4595494aa70b4eb9c74f099 Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org> Reviewed-on: https://review.coreboot.org/23206 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/zoombini/variants/baseboard/devicetree.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb
index 1bf5dba562..da40baf1d9 100644
--- a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb
@@ -8,6 +8,12 @@ chip soc/intel/cannonlake
register "gpe0_dw1" = "PMC_GPP_B"
register "gpe0_dw2" = "PMC_GPP_C"
+ # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
+ register "gen1_dec" = "0x00fc0801"
+ register "gen2_dec" = "0x000c0201"
+ # EC memory map range is 0x900-0x9ff
+ register "gen3_dec" = "0x00fc0901"
+
device cpu_cluster 0 on
device lapic 0 on end
end