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author | Aaron Durbin <adurbin@chromium.org> | 2018-01-29 17:49:36 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2018-01-30 05:38:52 +0000 |
commit | 9325710d72391f67386e94a45482f019df90ebec (patch) | |
tree | 142ae7294f6ce09e6f8956a5e8d37dc9b7d8c61e /src | |
parent | de3e84c9258a0aeb75b5874975b7c21baaea92f1 (diff) | |
download | coreboot-9325710d72391f67386e94a45482f019df90ebec.tar.xz |
mb/google/kahlee: mark h1 bus as early init for grunt
Since the h1 i2c bus is required for verstage mark the bus
as needing to be initialized early. That way, the bus is initialized
in bootblock prior to verstage.
BUG=b:70232394,b:69250772
Change-Id: Ice8525e08ccb438bc468d4c8bd311f72eddc7eb6
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/23498
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/kahlee/variants/grunt/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb index d2453a1e67..91aa1f9182 100644 --- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb @@ -30,6 +30,7 @@ chip soc/amd/stoneyridge # Enable I2C1 for H1 at 400kHz register "i2c[1]" = "{ + .early_init = 1, .speed = I2C_SPEED_FAST, .rise_time_ns = 84, .fall_time_ns = 4, |