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authorHung-Te Lin <hungte@chromium.org>2013-08-08 11:27:27 +0800
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 22:45:57 +0100
commit93951f4ed8b15c7140961a24d7fa756e3ec204ff (patch)
tree8c2fcc24f392a3d044e3c261106781713484540a /src
parent792b621ac03cb0d0eab065374f912a103a7b4080 (diff)
downloadcoreboot-93951f4ed8b15c7140961a24d7fa756e3ec204ff.tar.xz
armv7: Add CPU & MP primitive instructions
To configure multi-processors, we need the intrinsic functions to get core ID, put core into idle state, and to wake up cores. Change-Id: I87a62dab6efd6c8bb0c8e46373da7c7eb7b16b35 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/65112 Reviewed-on: http://review.coreboot.org/4444 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src')
-rw-r--r--src/arch/armv7/include/arch/cpu.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/src/arch/armv7/include/arch/cpu.h b/src/arch/armv7/include/arch/cpu.h
index f8b3005e95..efd2dc9af9 100644
--- a/src/arch/armv7/include/arch/cpu.h
+++ b/src/arch/armv7/include/arch/cpu.h
@@ -48,4 +48,40 @@ struct cpuinfo_arm {
#endif
+/* Primitives for CPU and MP cores. */
+
+/* read Main Id register (MIDR) */
+inline static uint32_t read_midr(void)
+{
+ uint32_t value;
+ asm volatile ("mrc p15, 0, %0, c0, c0, 0" : "=r"(value));
+ return value;
+}
+
+/* read Multiprocessor Affinity Register (MPIDR) */
+inline static uint32_t read_mpidr(void)
+{
+ uint32_t value;
+ asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r"(value));
+ return value;
+}
+
+/* wait for interrupt. */
+inline static void wfi(void)
+{
+ asm volatile ("wfi" : : : "memory");
+}
+
+/* wait for event. */
+inline static void wfe(void)
+{
+ asm volatile ("wfe");
+}
+
+/* set event (to bring up cores in WFE state). */
+inline static void sev(void)
+{
+ asm volatile ("sev");
+}
+
#endif /* __ARCH_CPU_H__ */