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authorJulius Werner <jwerner@chromium.org>2016-10-03 12:52:55 -0700
committerPatrick Georgi <pgeorgi@google.com>2016-10-07 17:55:47 +0200
commit93b51e7ac9242738a9e3354661ea7a9980938e0a (patch)
treefe0274956f49ba5ad65fe13a2b01e4abea6eee0f /src
parente06a1b895c9905c53faaacf9286bafea7a3ef921 (diff)
downloadcoreboot-93b51e7ac9242738a9e3354661ea7a9980938e0a.tar.xz
ec/google/chromeec: Add minimum delay between SPI CS assertions
Some Chrome OS ECs require a small amount of time after a SPI transaction to reset their controllers before they can service the next CS assertion. The kernel and depthcharge have always enforced a 200us minimum delay for this... coreboot should've done the same. BRANCH=gru BUG=chrome-os-partner:58046 TEST=Booted Kevin in recovery mode, confirmed that recovery events got logged with correct timestamps in eventlog. Change-Id: I32ec343f3293ac93729d3e6e2f43d7605a396cdb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: b9e4696533d4318ae7c8715b71ab963d8897c16c Original-Change-Id: I6a7baf7859d5d50e299495d118e7890dcaa2c1b0 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/392206 Original-Tested-by: Shawn N <shawnn@chromium.org> Original-Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-on: https://review.coreboot.org/16885 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/ec/google/chromeec/ec_spi.c32
1 files changed, 21 insertions, 11 deletions
diff --git a/src/ec/google/chromeec/ec_spi.c b/src/ec/google/chromeec/ec_spi.c
index e93d038213..a0049c6860 100644
--- a/src/ec/google/chromeec/ec_spi.c
+++ b/src/ec/google/chromeec/ec_spi.c
@@ -20,6 +20,11 @@
#include <spi-generic.h>
#include <timer.h>
+/* This is assuming that this driver is not used on x86. If that changes, this
+ might need to become a CAR_GLOBAL or maybe even more complicated. */
+static struct stopwatch cs_cooldown_sw;
+static const long cs_cooldown_us = 200;
+
static const uint8_t EcFramingByte = 0xec;
#define PROTO3_MAX_PACKET_SIZE 268
@@ -44,7 +49,10 @@ void *crosec_get_buffer(size_t size, int req)
static int crosec_spi_io(size_t req_size, size_t resp_size, void *context)
{
struct spi_slave *slave = (struct spi_slave *)context;
+ int ret = 0;
+ while (!stopwatch_expired(&cs_cooldown_sw))
+ /* Wait minimum delay between CS assertions. */;
spi_claim_bus(slave);
/* Allow EC to ramp up clock after being awaken.
@@ -53,8 +61,8 @@ static int crosec_spi_io(size_t req_size, size_t resp_size, void *context)
if (spi_xfer(slave, req_buf, req_size, NULL, 0)) {
printk(BIOS_ERR, "%s: Failed to send request.\n", __func__);
- spi_release_bus(slave);
- return -1;
+ ret = -1;
+ goto out;
}
uint8_t byte;
@@ -65,8 +73,8 @@ static int crosec_spi_io(size_t req_size, size_t resp_size, void *context)
if (spi_xfer(slave, NULL, 0, &byte, sizeof(byte))) {
printk(BIOS_ERR, "%s: Failed to receive byte.\n",
__func__);
- spi_release_bus(slave);
- return -1;
+ ret = -1;
+ goto out;
}
if (byte == EcFramingByte)
break;
@@ -75,28 +83,30 @@ static int crosec_spi_io(size_t req_size, size_t resp_size, void *context)
printk(BIOS_ERR,
"%s: Timeout waiting for framing byte.\n",
__func__);
- spi_release_bus(slave);
- return -1;
+ ret = -1;
+ goto out;
}
}
if (spi_xfer(slave, NULL, 0, resp_buf, resp_size)) {
printk(BIOS_ERR, "%s: Failed to receive response.\n", __func__);
- spi_release_bus(slave);
- return -1;
+ ret = -1;
}
+out:
spi_release_bus(slave);
-
- return 0;
+ stopwatch_init_usecs_expire(&cs_cooldown_sw, cs_cooldown_us);
+ return ret;
}
int google_chromeec_command(struct chromeec_command *cec_command)
{
static struct spi_slave *slave = NULL;
- if (!slave)
+ if (!slave) {
slave = spi_setup_slave(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS,
CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP);
+ stopwatch_init(&cs_cooldown_sw);
+ }
return crosec_command_proto(cec_command, crosec_spi_io, slave);
}