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authorFurquan Shaikh <furquan@chromium.org>2017-10-16 22:26:58 -0700
committerFurquan Shaikh <furquan@google.com>2017-10-19 00:43:11 +0000
commita2480184e0406f4e958051fb30908aecb27d33d4 (patch)
tree668af36ac9dcda878d0580f6273bb081bf76cba5 /src
parent43810d933209ddf7ca0622ff838e6f02f4d8f810 (diff)
downloadcoreboot-a2480184e0406f4e958051fb30908aecb27d33d4.tar.xz
soc/intel/skylake: Use newly added pmc_read_pm1_control
BUG=b:67874513 Change-Id: I298065f30647ae9bba8f6a8481bd34eec64f1d8e Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/22083 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/skylake/smihandler.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/smihandler.c b/src/soc/intel/skylake/smihandler.c
index daf8e0eaf5..20c4109272 100644
--- a/src/soc/intel/skylake/smihandler.c
+++ b/src/soc/intel/skylake/smihandler.c
@@ -140,7 +140,7 @@ static void southbridge_smi_sleep(void)
pmc_disable_smi(SLP_SMI_EN);
/* Figure out SLP_TYP */
- reg32 = inl(ACPI_BASE_ADDRESS + PM1_CNT);
+ reg32 = pmc_read_pm1_control();
printk(BIOS_SPEW, "SMI#: SLP = 0x%08x\n", reg32);
slp_typ = acpi_sleep_from_pm1(reg32);
@@ -213,8 +213,7 @@ static void southbridge_smi_sleep(void)
* the line above. However, if we entered sleep state S1 and wake
* up again, we will continue to execute code in this function.
*/
- reg32 = inl(ACPI_BASE_ADDRESS + PM1_CNT);
- if (reg32 & SCI_EN) {
+ if (pmc_read_pm1_control() & SCI_EN) {
/* The OS is not an ACPI OS, so we set the state to S0 */
pmc_disable_pm1_control(SLP_EN | SLP_TYP);
}