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authorRichard Spiegel <richard.spiegel@silverbackltd.com>2018-01-16 13:25:40 -0700
committerMartin Roth <martinroth@google.com>2018-01-22 21:37:33 +0000
commita318d2812dd2af2087557cd2a8172b38bfc589e9 (patch)
treeef72631425dbde47b3489318e8df42a13e40bbaa /src
parent2ce90903b0302d3b225973ea65402653a5cf3fb0 (diff)
downloadcoreboot-a318d2812dd2af2087557cd2a8172b38bfc589e9.tar.xz
AMD/stoneyridge: Fix SATA reset inconsistency
At AGESA AmdInitReset, SATA enable and IDE enable (elements of FCH_RESET_INTERFACE) are programmed twice (before calling AGESA for AmdInitReset and from said AGESA function call out), using different functions with different results. The first would result in TRUE/FALSE, the second set would result in TRUE/TRUE. Use the functions of the second set within the first set, and remove them from the second set. BUG=b:71754828 TEST=Build kahlle without the change, boot and record output. Rebuild kahlee with the change, boot and record output. Compare both outputs, the should be no change except in timing. Change-Id: I326fcc8801542aa7feef286d02abdfe63354cdd0 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/23295 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/stoneyridge/BiosCallOuts.c2
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c4
2 files changed, 2 insertions, 4 deletions
diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c
index f6ac187353..cb225ecd9e 100644
--- a/src/soc/amd/stoneyridge/BiosCallOuts.c
+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c
@@ -35,8 +35,6 @@ AGESA_STATUS agesa_fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
FCH_RESET_DATA_BLOCK *FchParams_reset;
FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
- FchParams_reset->FchReset.SataEnable = sb_sata_enable();
- FchParams_reset->FchReset.IdeEnable = sb_ide_enable();
/* Get platform specific configuration changes */
platform_FchParams_reset(FchParams_reset);
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 863a4ef01e..cf896cb857 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -41,8 +41,8 @@ static int is_sata_config(void)
void SetFchResetParams(FCH_RESET_INTERFACE *params)
{
params->Xhci0Enable = IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE);
- params->SataEnable = is_sata_config();
- params->IdeEnable = !params->SataEnable;
+ params->SataEnable = sb_sata_enable();
+ params->IdeEnable = sb_ide_enable();
}
void SetFchEnvParams(FCH_INTERFACE *params)