diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-08-24 08:49:29 -0500 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-08-24 20:02:04 +0200 |
| commit | a6914d2343ba5c4aa676d27547fc33571c69e4f0 (patch) | |
| tree | 27bdab07d034fef6a2afc903a592b92a66d5f709 /src | |
| parent | dde073829fd0840c903d025b274e9515a4692d7b (diff) | |
| download | coreboot-a6914d2343ba5c4aa676d27547fc33571c69e4f0.tar.xz | |
soc/intel/skylake: align chromium Chrome OS config
The chromium tree is currently using a different config for
Chrome OS than what is being built in coreboot.org. Align those
settings to reflect how skylake Chrome OS boards are actually
shipped to provide proper parity between coreboot.org and chromium.
Change-Id: I7ab9c1dfa8c6be03ac2125fb06cb7022f3befa97
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16313
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/skylake/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 1 |
2 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 7fa129bf18..3bf87981cf 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -56,9 +56,11 @@ config CPU_SPECIFIC_OPTIONS config CHROMEOS select CHROMEOS_RAMOOPS_DYNAMIC select EC_SOFTWARE_SYNC if EC_GOOGLE_CHROMEEC + select SEPARATE_VERSTAGE select VBOOT_EC_SLOW_UPDATE select VBOOT_OPROM_MATTERS select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT + select VBOOT_STARTS_IN_BOOTBLOCK select VBOOT_VBNV_CMOS select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH select VIRTUAL_DEV_SWITCH diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index b92eab317f..716c3d503f 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -28,6 +28,7 @@ bootblock-y += pmutil.c bootblock-y += tsc_freq.c verstage-y += flash_controller.c +verstage-y += monotonic_timer.c verstage-y += pch.c verstage-$(CONFIG_UART_DEBUG) += uart_debug.c |