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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-10-13 20:41:57 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-01-22 20:53:00 +0100 |
commit | a7c9611712efc04c0c73a8a8621eabd5c869af89 (patch) | |
tree | 6f6aa19a68b38f8ff37d7b38da981a57a4879020 /src | |
parent | 66fd775168a46e5f7ee0c121735d3be98bbcab1c (diff) | |
download | coreboot-a7c9611712efc04c0c73a8a8621eabd5c869af89.tar.xz |
intel/i945 boards: Add EARLY_CBMEM_INIT
Inspired by commits ac6ea04b and 4560ca50 that enabled this feature
for lenovo/x60 and lenovo/t60 with i945 chipset.
Change-Id: Ia04f58b8c3769b5734708c6a338bb80c13c5aeba
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3994
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/getac/p470/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/getac/p470/romstage.c | 8 | ||||
-rw-r--r-- | src/mainboard/ibase/mb899/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/ibase/mb899/romstage.c | 8 | ||||
-rw-r--r-- | src/mainboard/intel/d945gclf/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/intel/d945gclf/romstage.c | 8 | ||||
-rw-r--r-- | src/mainboard/kontron/986lcd-m/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/kontron/986lcd-m/romstage.c | 8 | ||||
-rw-r--r-- | src/mainboard/roda/rk886ex/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/roda/rk886ex/romstage.c | 8 |
10 files changed, 30 insertions, 15 deletions
diff --git a/src/mainboard/getac/p470/Kconfig b/src/mainboard/getac/p470/Kconfig index 3fdf6f74cc..db42233049 100644 --- a/src/mainboard/getac/p470/Kconfig +++ b/src/mainboard/getac/p470/Kconfig @@ -30,6 +30,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SUPERIO_SMSC_FDC37N972 select SUPERIO_SMSC_SIO10N268 select EC_ACPI + select EARLY_CBMEM_INIT select HAVE_ACPI_TABLES select HAVE_PIRQ_TABLE select HAVE_MP_TABLE diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index f4e43e5c25..87af8cadcb 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <cpu/x86/lapic.h> #include <lib.h> +#include <cbmem.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/x86/bist.h> @@ -263,12 +264,11 @@ static void early_ich7_init(void) RCBA32(0x2034) = reg32; } -#include <cbmem.h> - void main(unsigned long bist) { u32 reg32; int boot_mode = 0; + int cbmem_was_initted; if (bist == 0) enable_lapic(); @@ -357,11 +357,13 @@ void main(unsigned long bist) #endif MCHBAR16(SSKPD) = 0xCAFE; + cbmem_was_initted = !cbmem_initialize(); + #if CONFIG_HAVE_ACPI_RESUME /* If there is no high memory area, we didn't boot before, so * this is not a resume. In that case we just create the cbmem toc. */ - if ((boot_mode == 2) && cbmem_reinit()) { + if ((boot_mode == 2) && cbmem_was_initted) { void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME); /* copy 1MB - 64K to high tables ram_base to prevent memory corruption diff --git a/src/mainboard/ibase/mb899/Kconfig b/src/mainboard/ibase/mb899/Kconfig index 36353b3795..72b916f51b 100644 --- a/src/mainboard/ibase/mb899/Kconfig +++ b/src/mainboard/ibase/mb899/Kconfig @@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_WINBOND_W83627EHG + select EARLY_CBMEM_INIT select HAVE_ACPI_TABLES select HAVE_PIRQ_TABLE select HAVE_MP_TABLE diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c index b059a579b9..222c376b4d 100644 --- a/src/mainboard/ibase/mb899/romstage.c +++ b/src/mainboard/ibase/mb899/romstage.c @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <cpu/x86/lapic.h> #include <lib.h> +#include <cbmem.h> #include "superio/winbond/w83627ehg/w83627ehg.h" #include <pc80/mc146818rtc.h> #include <console/console.h> @@ -221,12 +222,11 @@ static void early_ich7_init(void) RCBA32(0x2034) = reg32; } -#include <cbmem.h> - void main(unsigned long bist) { u32 reg32; int boot_mode = 0; + int cbmem_was_initted; if (bist == 0) enable_lapic(); @@ -311,11 +311,13 @@ void main(unsigned long bist) MCHBAR16(SSKPD) = 0xCAFE; + cbmem_was_initted = !cbmem_initialize(); + #if CONFIG_HAVE_ACPI_RESUME /* If there is no high memory area, we didn't boot before, so * this is not a resume. In that case we just create the cbmem toc. */ - if ((boot_mode == 2) && cbmem_reinit()) { + if ((boot_mode == 2) && cbmem_was_initted) { void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME); /* copy 1MB - 64K to high tables ram_base to prevent memory corruption diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig index 0a9de1a1a0..b676eb69b1 100644 --- a/src/mainboard/intel/d945gclf/Kconfig +++ b/src/mainboard/intel/d945gclf/Kconfig @@ -30,6 +30,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE + select EARLY_CBMEM_INIT select HAVE_ACPI_TABLES select HAVE_ACPI_RESUME select BOARD_ROMSIZE_KB_512 diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index 248aa3bf17..166743f552 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <cpu/x86/lapic.h> #include <lib.h> +#include <cbmem.h> #include "superio/smsc/lpc47m15x/lpc47m15x.h" #include <pc80/mc146818rtc.h> #include <console/console.h> @@ -182,12 +183,11 @@ static void early_ich7_init(void) RCBA32(0x2034) = reg32; } -#include <cbmem.h> - void main(unsigned long bist) { u32 reg32; int boot_mode = 0; + int cbmem_was_initted; if (bist == 0) enable_lapic(); @@ -269,11 +269,13 @@ void main(unsigned long bist) MCHBAR16(SSKPD) = 0xCAFE; + cbmem_was_initted = !cbmem_initialize(); + #if CONFIG_HAVE_ACPI_RESUME /* If there is no high memory area, we didn't boot before, so * this is not a resume. In that case we just create the cbmem toc. */ - if ((boot_mode == 2) && cbmem_reinit()) { + if ((boot_mode == 2) && cbmem_was_initted) { void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME); /* copy 1MB - 64K to high tables ram_base to prevent memory corruption diff --git a/src/mainboard/kontron/986lcd-m/Kconfig b/src/mainboard/kontron/986lcd-m/Kconfig index e8b722523d..29d4da46a5 100644 --- a/src/mainboard/kontron/986lcd-m/Kconfig +++ b/src/mainboard/kontron/986lcd-m/Kconfig @@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_WINBOND_W83627THG + select EARLY_CBMEM_INIT select HAVE_ACPI_TABLES select HAVE_PIRQ_TABLE select HAVE_MP_TABLE diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index 324f442f44..1875a10ad4 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -22,6 +22,7 @@ #include <stdint.h> #include <string.h> #include <lib.h> +#include <cbmem.h> #include <arch/io.h> #include <device/pci_def.h> #include <device/pnp_def.h> @@ -314,12 +315,11 @@ static void early_ich7_init(void) RCBA32(0x2034) = reg32; } -#include <cbmem.h> - void main(unsigned long bist) { u32 reg32; int boot_mode = 0; + int cbmem_was_initted; if (bist == 0) enable_lapic(); @@ -410,11 +410,13 @@ void main(unsigned long bist) MCHBAR16(SSKPD) = 0xCAFE; + cbmem_was_initted = !cbmem_initialize(); + #if CONFIG_HAVE_ACPI_RESUME /* If there is no high memory area, we didn't boot before, so * this is not a resume. In that case we just create the cbmem toc. */ - if ((boot_mode == 2) && cbmem_reinit()) { + if ((boot_mode == 2) && cbmem_was_initted) { void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME); /* copy 1MB - 64K to high tables ram_base to prevent memory corruption diff --git a/src/mainboard/roda/rk886ex/Kconfig b/src/mainboard/roda/rk886ex/Kconfig index 2113debb49..365980e143 100644 --- a/src/mainboard/roda/rk886ex/Kconfig +++ b/src/mainboard/roda/rk886ex/Kconfig @@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE + select EARLY_CBMEM_INIT select HAVE_ACPI_TABLES select HAVE_ACPI_RESUME select BOARD_ROMSIZE_KB_1024 diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index cb141f9f80..e08c1c025f 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -28,6 +28,7 @@ #include <device/pnp_def.h> #include <cpu/x86/lapic.h> #include <lib.h> +#include <cbmem.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/x86/bist.h> @@ -249,12 +250,11 @@ static void init_artec_dongle(void) outb(0xf4, 0x88); } -#include <cbmem.h> - void main(unsigned long bist) { u32 reg32; int boot_mode = 0; + int cbmem_was_initted; if (bist == 0) enable_lapic(); @@ -346,11 +346,13 @@ void main(unsigned long bist) MCHBAR16(SSKPD) = 0xCAFE; + cbmem_was_initted = !cbmem_initialize(); + #if CONFIG_HAVE_ACPI_RESUME /* If there is no high memory area, we didn't boot before, so * this is not a resume. In that case we just create the cbmem toc. */ - if ((boot_mode == 2) && cbmem_reinit()) { + if ((boot_mode == 2) && cbmem_was_initted) { void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME); /* copy 1MB - 64K to high tables ram_base to prevent memory corruption |